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CMPXCHG16B would previously use a single global lock to provide some (but not perfect) atomicity to the instruction, since we don't have hardware support. This would cause high contention. In some games, the blocks with the lock would take up 80% of the CPU and lag immensely.
This PR implements a fast per-address spinlock. A random spinlock out of 256 is picked based on a hash of the address. This greatly reduces collisions and improves performance in affected games by a lot. If two threads perform CAS on the same address, the same spinlock is picked, providing the same atomicity guarantees as before, assuming all the instructions are aligned.