fix: sync Intel WMI CPU power limits to RAPL powercap interfaces

[scardracs]

Description

Sync Intel CPU power limits (ppt_pl1_spl, ppt_pl2_sppt, ppt_pl3_fppt) to the kernel's RAPL (powercap) sysfs interfaces.
On modern Intel-based ROG laptops (such as the i9-13980HX on Strix G814JZ), the ASUS BIOS/WMI firmware does not correctly propagate or synchronize WMI power limits to the actual CPU MSR or MMIO RAPL registers. Writing to the WMI attributes under asus-armoury succeeds and reads back correctly, but has no actual hardware effect because the kernel's intel-rapl-mmio controller remains hard-locked at default constraint wattages (e.g., 45W/90W).
This patch bridges the gap by writing directly to the corresponding /sys/class/powercap nodes when Intel limits are set.

Changes

1. Intel CPU Detection: Adds a safe /proc/cpuinfo check (GenuineIntel) to ensure this logic is only applied on Intel platforms.
2. RAPL / Powercap Sync: Walks /sys/class/powercap to find any directories belonging to intel-rapl and updates:
   • constraint_0 (PL1 / SPL)
   • constraint_1 (PL2 / sPPT)
   • constraint_2 (PL3 / fPPT)
3. Full State Synchronization: Every time any of the WMI power limit attributes are written to, it triggers a full synchronization of all three limits to prevent any discrepancies or resets.

How to Test

Apply any CPU power limits via asusctl:

asusctl armoury set ppt_pl1_spl 110
asusctl armoury set ppt_pl2_sppt 135

Closes: #145
Assisted-by: Antigravity:gemini-3.5-flash
Signed-off-by: Marco Scardovi scardracs@disroot.org

[scardracs]

@denisu14 as I don't have an Intel CPU I can't test it. It should work but please test it

[denisu14]

@scardracs sorry for the late reply. the patch doesn't work for me. i'll investigate and see what fails and let you know.

[denisu14]

okay. found something in journald. I had deleted my asusd.ron config and default is false for the tuning field so it disabled this code path.
asusd[38362]: [WARN asusd::asus_armoury] Tuning is disabled: skipping setting value to PPT property ppt_pl1_spl

I thought changing it back to true would fix everything but turns out the patch actually times out the systemd service by infinitely looping and setting pl1 when service starts.

Fix: scardracs#1
Tested and works on my machine.

[denisu14]

We may want to add a way to set ac_profile_tunings via asusctl as some people may not be aware of the config option in /etc/asusd.ron.

[scardracs]

We may want to add a way to set ac_profile_tunings via asusctl as some people may not be aware of the config option in /etc/asusd.ron.

I think #142 will make everything easier once merged

[scardracs]

okay. found something in journald. I had deleted my asusd.ron config and default is false for the tuning field so it disabled this code path. asusd[38362]: [WARN asusd::asus_armoury] Tuning is disabled: skipping setting value to PPT property ppt_pl1_spl

I thought changing it back to true would fix everything but turns out the patch actually times out the systemd service by infinitely looping and setting pl1 when service starts.

Fix: scardracs#1 Tested and works on my machine.

Yeah, way better than my implementation. Merged on my branch