[Build] Ship MLIR Python bindings in the LLVM artifact; add design docs - #256

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YWHyuk wants to merge 26 commits into

feature/mlir-python-bindings

Commits on Jun 15, 2026

[Build] Ship MLIR Python bindings in the LLVM artifact; add design docs

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79847a4
[Frontend] Lower vlane index via torchsim.vlane_idx + Python MLIR pass

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f7d7f45
[Frontend] Run standard MLIR->LLVM lowering in-process via bindings PassManager

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47fe19d
[Docs] Refine dma-transfer-lowering: rank-based peel + gemmini boundary

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fc9c1cc
[Frontend] Lower memref.dma_start to Gemmini asm in Python; drop C++ memref-to-gemmini

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b9ed2c7

Commits on Jun 16, 2026

[Frontend] Auto-resolve MLIR bindings path from TORCHSIM_LLVM_PATH

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05ddb62
WIP: op coverage script + mlir bindings smoke test

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88a78f4
WIP: aligned axis-split prototype at scheduling layer

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a3978cf
ci: rebuild thirdparty base image to pick up v1.0.9 MLIR python bindings
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d16cec3
[Frontend] Emit togsim.transfer for >4D DMA; generalize init_tile_size

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69da460
[Docs] Narrow decompose-transfer to aligned-only mechanical peel

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88c518c
[Frontend] Decompose togsim.transfer to <=4D dma_start (unit-collapse path)

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695d9b0
[Frontend] decompose-transfer: peel >4 effective dims via unrolled subview

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0ebe0d1
[Frontend] axis-split: reindex collapsed LoopBody instead of re-tracing

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bff010c
[Frontend] axis-split: integer-typed split symbols + r-prefix reduce dims

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f22a0d7
[Frontend] axis-split: mixed-radix split for ModularIndexing + multi-radix

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96d7b54
[Frontend] axis-split: validate reduction pass-through via force gate

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f94a9d6
ci: bump LLVM pin to v1.0.10 (MLIR bindings with real files)

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b5d61c0
[Frontend] axis-split: add uncovered floor/mod ledger (read-only)

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aa4339d

Commits on Jun 17, 2026

test(deepseek): seed global RNG so config-random weights are deterministic

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8c6535d
[Frontend] axis-split: shared boundary helpers, rank guard, residual-floor fold

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2b04f87
[Frontend] graph-copy: relayout an operand on incompatible / cross-axis floor/mod

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f648720
[Frontend] decompose-transfer peel: fix #258 TOG crash (affine.apply DRAM offset)

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3d871c8
[Frontend] enable axis-split + graph-copy by default; instrument recompile-dance

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6d1b799
[Test] floor/mod axis-split + graph-copy coverage

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856884c
[Docs] axis-split + decompose-transfer: graph-copy, default-on, peel/#258 notes

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692588c