fix(boards): use the full 256K SRAM on F412 cannodes - #28498
Merged
Conversation
github-actions
Bot
added
the
kind:bug
github-actions
Bot
added
scope:dependencies
Contributor
🔎 FLASH Analysispx4_fmu-v5x [Total VM Diff: -24 byte (-0 %)]px4_fmu-v6x [Total VM Diff: -24 byte (-0 %)]Updated: 2026-09-03T22:07:12 |
dakejahl
force-pushed
the
dakejahl/f412-sram-end
branch
from
September 2, 2026 16:48
085420a to
2ba2a1a
Compare
dakejahl
marked this pull request as draft
September 2, 2026 19:43
NuttX now ends the F412 heap at 0x20040000. The linker scripts still capped .data/.bss at 192K, leftover from the F42x split. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
dakejahl
force-pushed
the
dakejahl/can-flow-mr-f412vg
branch
from
September 3, 2026 21:54
5c9ae91 to
7a9a76c
Compare
dakejahl
force-pushed
the
dakejahl/f412-sram-end
branch
from
September 3, 2026 21:54
2ba2a1a to
917d745
Compare
dakejahl
marked this pull request as ready for review
September 3, 2026 21:54
dakejahl
added a commit
that referenced
this pull request
Sep 4, 2026
…K cannodes (#28456) * fix(can-flow-mr): use STM32F412VG and 960K of app flash The part is STM32F412VGH6 (100-pin, 1MB), not the 48-pin 512KB CE. App flash starts at 0x08010000 after the 64K bootloader+params window, so the region is 960K, not 928K. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * fix(boards): select STM32F412VG on the 100-pin 1MB ARK cannodes Teseo, X20, F9P, and Septentrio/MOSAIC/G5 GPS modules use STM32F412VGH6, same as Flow MR. They were still selecting the 48-pin 512KB CE and a 928K app region that double-counted params. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * fix(ark/cannode): use STM32F412CG and 960K of app flash The part is STM32F412CGU6, not the 512KB CE. App flash starts at 0x08010000 after the 64K bootloader+params window, so the region is 960K, not 928K. * fix(ark/mag): use STM32F412VG and 960K of app flash The part is STM32F412VGH6, not the 48-pin 512KB CE, and the app region after the 64K bootloader+params reservation is 960K, not 928K. * docs(boards): fix the F412 SRAM description in the cannode linker scripts The F412 has one contiguous 256KB SRAM at 0x20000000. The block list these scripts carried is F42x boilerplate and describes memory the part does not have. * fix(ark/dist): use STM32F412VG and 960K of app flash The part is STM32F412VGH6, not the 48-pin 512KB CE. App flash starts at 0x08010000 after the 64K bootloader+params window, so the region is 960K, not 928K. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * fix(boards): give F412 cannodes a 256K SRAM region (#28498) NuttX now ends the F412 heap at 0x20040000. The linker scripts still capped .data/.bss at 192K, leftover from the F42x split. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * docs(boards): fix the F412 SRAM description on the 512K ARK cannodes The F412 has one contiguous 256KB SRAM at 0x20000000. The block list these scripts carried is F42x boilerplate and describes memory the part does not have. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * fix(ark/cannode): drop the PH1 boot jumper defines PH1 is OSC_OUT for the HSE crystal. The jumper option was already undefined, so these defines could not be enabled without stopping the clock. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> * fix(boards): correct ARK cannode I2C bitbang pins The bitbang GPIO defines did not match the schematic nets, so a bus reset would drive the wrong pins. Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com> --------- Signed-off-by: Jacob Dahl <dahl.jakejacob@gmail.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Open the cannode linker SRAM region to 256K so
.data/.bsscan use the upper 64K. NuttX 12.12 already ends the F412 heap at0x20040000(PX4/NuttX#407).Stacked on #28456.
Problem
The board linker scripts still described the F42x 192K split, so
.data/.bsscould not use the upper 64K.Solution
Set
sram LENGTHto 256K on the ARK F412 cannodes (VG/CG from #28456 and the remaining CE boards, which have the same 256K SRAM).