name: BMI2 Instruction Not Supported on Intel J4125 (Goldmont Plus)
about: Document CPU instruction set limitation for J4125-based systems
labels: hardware, compatibility, cpu
Summary
Intel Celeron J4125 does not support the BMI2 (Bit Manipulation Instruction Set 2) instruction set. Running binaries that depend on BMI2 will result in a SIGILL (Illegal Instruction) crash on J4125-based systems.
Environment
| Property |
Value |
| CPU |
Intel Celeron J4125 |
| Platform |
Gemini Lake Refresh |
| Microarchitecture |
Goldmont Plus (Atom family) |
| Process Node |
14nm |
| Release |
Q4 2019 |
| TDP |
10W |
Problem Description
The J4125 is based on Intel's Goldmont Plus microarchitecture, which belongs to the low-power Atom family. This architecture does not include BMI1 or BMI2 support, nor does it support AVX/AVX2 or FMA3.
Any software compiled with -mbmi2 or that relies on runtime CPU feature detection for BMI2 (e.g., BZHI, MULX, PDEP, PEXT, RORX, SARX, SHRX, SHLX) will immediately crash on this platform.
Confirmed Unsupported Instructions
BZHI, MULX, PDEP, PEXT, RORX, SARX, SHRX, SHLX
Instruction Set Support Matrix (J4125 / Goldmont Plus)
| Instruction Set |
Supported |
| SSE / SSE2 / SSE3 / SSSE3 |
✅ |
| SSE4.1 / SSE4.2 |
✅ |
| AES-NI |
✅ |
| PCLMUL |
✅ |
| SHA |
✅ |
| RDRAND / RDSEED |
✅ |
| AVX / AVX2 |
❌ |
| BMI1 |
❌ |
| BMI2 |
❌ |
| FMA3 |
❌ |
Intel Atom Microarchitecture — BMI2 Support Timeline
BMI2 support was introduced in the Atom family starting with Tremont (2020):
| Microarchitecture |
Platform |
BMI2 |
| Silvermont (2013) |
Z3xxx, J1xxx, N2xxx |
❌ |
| Airmont (2015) |
Z8xxx, x5/x7 |
❌ |
| Goldmont (2016) |
J3xxx, N3xxx (Apollo Lake) |
❌ |
| Goldmont Plus (2017–2019) |
J4xxx, N4xxx (Gemini Lake) |
❌ |
| Tremont (2020) |
J6xxx, N6xxx (Jasper/Elkhart Lake) |
✅ |
| Gracemont (2021+) |
N100, N200, N305, Alder Lake E-core |
✅ |
Impact
- Software with hard BMI2 dependency (e.g., InfluxDB v3, some compression libraries) will fail to start on J4125-based systems.
- This affects many embedded/NAS devices (e.g., Synology, QNAP, industrial mini-PCs) using the J4125.
- There is no workaround at the software level without recompiling without BMI2 support.
Suggested Fix / Workaround
- Runtime detection: Check CPU feature flags (
/proc/cpuinfo → bmi2) before executing BMI2-dependent code paths.
- Graceful fallback: Provide a non-BMI2 code path for systems that do not expose the
bmi2 flag.
- Hardware upgrade: If BMI2 is strictly required, upgrade to a platform using Tremont (e.g., N5105, J6412) or Gracemont (e.g., N100, N200) which fully support BMI2.
Check BMI2 availability at runtime (Linux)
grep -o 'bmi2' /proc/cpuinfo | head -1
# Empty output = BMI2 NOT supported (e.g., J4125)
# "bmi2" = BMI2 IS supported
References
name: BMI2 Instruction Not Supported on Intel J4125 (Goldmont Plus)
about: Document CPU instruction set limitation for J4125-based systems
labels: hardware, compatibility, cpu
Summary
Intel Celeron J4125 does not support the BMI2 (Bit Manipulation Instruction Set 2) instruction set. Running binaries that depend on BMI2 will result in a
SIGILL(Illegal Instruction) crash on J4125-based systems.Environment
Problem Description
The J4125 is based on Intel's Goldmont Plus microarchitecture, which belongs to the low-power Atom family. This architecture does not include BMI1 or BMI2 support, nor does it support AVX/AVX2 or FMA3.
Any software compiled with
-mbmi2or that relies on runtime CPU feature detection for BMI2 (e.g.,BZHI,MULX,PDEP,PEXT,RORX,SARX,SHRX,SHLX) will immediately crash on this platform.Confirmed Unsupported Instructions
Instruction Set Support Matrix (J4125 / Goldmont Plus)
Intel Atom Microarchitecture — BMI2 Support Timeline
BMI2 support was introduced in the Atom family starting with Tremont (2020):
Impact
Suggested Fix / Workaround
/proc/cpuinfo→bmi2) before executing BMI2-dependent code paths.bmi2flag.Check BMI2 availability at runtime (Linux)
References