Consolidated chages upto 22 sept 2023 2nd try#4
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updated the pixel_mhz to keep the same of clk_mhz
removed the VGA_CLK output
Update way to access VGA with new configuration structure
Signed-off-by: Pete Delaney <pete.delaney.2@gmail.comq>
Added de1 Support to new framework
…les in the common folder and updated the xilinx_sythesis_script
Zybo-Z7 update
Updated board_specific_top file for nexys4
nexys4 update
Add switch controller for tm1638
Draft: Emocc refactor
Get a compile error going from 9 to 10 bits. Signed-off-by: Pete Delaney <piet.delaney@gmail.com>
Signed-off-by: verilog <piet.delaney@gmail.com>
Signed-off-by: Pete Delaney <piet.delaney@gmail.com>
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