Update Refinement Handling in Verilog Verification Target Generation#219
Update Refinement Handling in Verilog Verification Target Generation#219zhanghongce wants to merge 81 commits intoPrincetonUniversity:masterfrom
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Honestly speaking, I'm having issues with compiling it on Windows. The core issue is in the dependent repo: https://github.com/zhanghongce/vexpparser, where I have no way to have the compiler on windows find the header I tried adding an option like |
Or perhaps terminate the Windows support.
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Hi Hongce, I will take a look at this. As we have already terminated several other CIs (e.g. travis-related ones due to the university account's credit issue), I would try my best to keep the rest CIs on. |
Hi Hongce, Can you grant me access to the repo for pr, I'd like to make a few changes to the script to see if that works. |
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This pull request introduces 1 alert when merging fb1c9d9 into 14b66e6 - view on LGTM.com new alerts:
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This pull request introduces 1 alert when merging 4924f92 into 14b66e6 - view on LGTM.com new alerts:
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… into refinement-upgrade

Work in progress, do not merge at this point!This pull request is to see if the test coverage is sufficient.