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Update Verilog parser#226

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Bo-Yuan-Huang wants to merge 2 commits intoPrincetonUniversity:masterfrom
Bo-Yuan-Huang:master
Open

Update Verilog parser#226
Bo-Yuan-Huang wants to merge 2 commits intoPrincetonUniversity:masterfrom
Bo-Yuan-Huang:master

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New bug fix for function port declaration.

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