[AIROCMLIR-1078] Port MIOpen conv layout translation to rocmlirTriton

[bogdan-petkovic]

Motivation

While running the MIOpen benchmark, every conv config fails with Invalid Layout Parameter Value because rocMLIR passes its own layout names (e.g. GNC01, NGC01) to MIOpenDriver, which only accepts NCHW/NHWC. The failures were silently converted to NaN, so nightly CI stayed green even though the MIOpen conv benchmarks never actually ran. This ports the fix from ROCm/rocMLIR#2422 over to rocmlirTriton.

Technical Details

Adds rocmlir_layout_to_miopen() and conv_commandline_to_miopen_layouts() to mlir/utils/performance/perfRunner.py, which translate the -f/-I/-O layout arguments to NCHW/NHWC only when they map exactly (the group dimension G is dropped since MIOpen conveys the group count via -g, and the spatial dims are renamed 0->H, 1->W). Configs whose layouts have no faithful MIOpen equivalent, or where filter/input/output do not agree on a single NCHW/NHWC layout, are skipped instead of being benchmarked against a different layout. ConvConfiguration.benchmark_external now raises RuntimeError on a real MIOpen benchmark failure or an output-parse failure instead of silently returning NaN, so CI fails on genuine errors (the raised error points at MIOpenDriver's stderr, which run_pipeline already prints to the log). This is a direct port of ROCm/rocMLIR#2422, unit tests were not ported because rocmlirTriton does not have a perfRunner test harness.

Test Plan

yapf and flake8 run clean on the changed file. The translate-or-skip logic was exercised locally over the full mlir/utils/performance/configs/tier1-conv-configs, and the mixed-layout skip decision was confirmed directly against MIOpenDriver on a gfx942 GPU (all-NCHW and all-NHWC run fine, a mixed filter/input/output layout fails at runtime with "No suitable algorithm was found to execute the required convolution").

Test Result

• Over tier1-conv-configs, 1296/1363 configs are translated and benchmarked (1294 NCHW, 2 NHWC) and 67 are skipped, all of which are genuinely non-representable orderings (G0NC1, 01NGC) or mixed NCHW/NHWC combinations. No layout errors and no silent NaN fallbacks remain.
• Nightly CI

Submission Checklist

• Look over the contributing guidelines at https://github.com/ROCm/ROCm/blob/develop/CONTRIBUTING.md#pull-requests.

[rocmlir-pr-reviewer]

Verdict: APPROVE -- submitted as COMMENT (automated reviews are advisory)  ·  Findings: 0 (0 Critical, 0 Major, 0 Minor)

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Scope

Ports the MIOpen conv-layout translation fix from ROCm/rocMLIR PR #2422 to mlir/utils/performance/perfRunner.py. Adds rocmlir_layout_to_miopen() / conv_commandline_to_miopen_layouts() to translate -f/-I/-O layout args to NCHW/NHWC (or skip when non-representable / mixed), and makes ConvConfiguration.benchmark_external raise on MIOpen failure or output-parse failure instead of silently returning NaN.

Findings

No blocking issues found.

Notes

• The normalization in rocmlir_layout_to_miopen (perfRunner.py:32) checks out against the on-command-line layout alphabet in FILTER_LAYOUT_MAP/INPUT_LAYOUT_MAP/OUTPUT_LAYOUT_MAP (perfRunner.py:85-87): e.g. GNC01→NCHW, NG01C→NHWC; the len(seen_layouts) > 1 guard (perfRunner.py:59) correctly skips inconsistent filter/input/output combinations. The .replace('K', 'C') step is effectively defensive (these configs express the output channel dim as C, not K) but is harmless.
• The new if not match: guard (perfRunner.py:879) fixes a latent AttributeError on ELAPSED_TIME_RE.search(...).group(1) when MIOpenDriver output can't be parsed — a real improvement over the prior code.
• The skip path still returns config.table_entry(np.nan) (perfRunner.py:863); this is an intentional "skip" signal (accompanied by a log line), distinct from the now-fatal genuine-error path, and matches the upstream rocMLIR behavior.
• rocMLIR back-port: mlir/utils/performance/ is shared with ROCm/rocMLIR, but the PR description explicitly identifies this as a direct port of rocMLIR PR #2422, satisfying the back-port note requirement. Unit tests were intentionally not ported (no perfRunner test harness in rocmlirTriton) — reasonable given the constraint.

CI status

No non-self checks are failing; py-checks/detect/ml-ci-internal.amd.com pass, Jenkins/Build and Test still pending. The auto-review check being in-progress is expected.

[Copilot]

Pull request overview

This PR updates the convolution performance runner to translate rocMLIR-style conv layout strings into the limited NCHW/NHWC layouts accepted by MIOpenDriver, skipping non-representable/mixed-layout configs and failing fast on real MIOpen benchmark or output-parse failures to avoid silently producing NaN.

Changes:

• Added rocmlir_layout_to_miopen() and conv_commandline_to_miopen_layouts() to translate -f/-I/-O layout arguments to NCHW/NHWC or skip when no faithful mapping exists.
• Updated ConvConfiguration.benchmark_external() to (a) skip configs without a faithful MIOpen layout and (b) raise RuntimeError on MIOpen execution failures or elapsed-time parse failures.

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[justinrosner]

I don't think that we currently run the MIOpen benchmarking tests in the nightly CI (It's currently commented out in the Jenkinsfile). It's also not addressed in #274 or #275.

Do we have any tickets to add running the MIOpen benchmarking tests to rocmlirTriton?

[bogdan-petkovic]

I don't think that we currently run the MIOpen benchmarking tests in the nightly CI (It's currently commented out in the Jenkinsfile). It's also not addressed in #274 or #275.

Do we have any tickets to add running the MIOpen benchmarking tests to rocmlirTriton?

You're right, we don't run the MIOpen benchmarking test at the moment. There is a ticket for it though, AIROCMLIR-901, which lists "Benchmark and Report Performance" as the remaining one to turn on. I picked it up from Djole last week.

It depends on AIROCMLIR-899, because the performance checks need the tuning DB that the weekly job produces. The original 899 PR had gone stale and a lot of it already landed on develop, so I opened a fresh PR for just the remaining part #361.

Once 899 is merged I'll do the 901 work to enable the nightly Benchmark and Report Performance stage, and then this port can go in on top of that.

[umangyadav]

unit tests were not ported because rocmlirTriton does not have a perfRunner test harness.

Would it be possible to add test harness ?

[dhernandez0]

unit tests were not ported because rocmlirTriton does not have a perfRunner test harness.

rocmlirTriton does have perfRunner tests: see perf-scripts/runtime/perfRunner-gemm.py

[bogdan-petkovic]

unit tests were not ported because rocmlirTriton does not have a perfRunner test harness.

Would it be possible to add test harness ?

added