Update stream pkg

vunit/vhdl/verification_components/src/avalon_sink.vhd

@@ -13,7 +13,7 @@ use ieee.std_logic_1164.all;
 
 context work.vunit_context;
 context work.com_context;
-use work.stream_slave_pkg.all;
+use work.stream_pkg.all;
 use work.avalon_stream_pkg.all;
 
 library osvvm;
@@ -39,6 +39,7 @@ begin
     variable msg_type : msg_type_t;
     variable rnd : RandomPType;
     variable avalon_stream_transaction : avalon_stream_transaction_t(data(data'range));
+    variable stream_transaction : stream_transaction_t(data(data'range));
   begin
     receive(net, sink.p_actor, msg);
     msg_type := message_type(msg);
@@ -67,7 +68,9 @@ begin
             end if;
             push_avalon_stream_transaction(reply_msg, avalon_stream_transaction);
           else
-            push_std_ulogic_vector(reply_msg, data);
+            stream_transaction.data := data;
+            stream_transaction.last := false;
+            push_stream_transaction(reply_msg, stream_transaction);
           end if;
           reply(net, msg, reply_msg);
           ready <= '0';

vunit/vhdl/verification_components/src/avalon_source.vhd

@@ -10,7 +10,7 @@ use ieee.std_logic_1164.all;
 
 context work.vunit_context;
 context work.com_context;
-use work.stream_master_pkg.all;
+use work.stream_pkg.all;
 use work.avalon_stream_pkg.all;
 use work.queue_pkg.all;
 use work.sync_pkg.all;

vunit/vhdl/verification_components/src/avalon_stream_pkg.vhd

@@ -8,8 +8,7 @@ library ieee;
 use ieee.std_logic_1164.all;
 
 use work.logger_pkg.all;
-use work.stream_master_pkg.all;
-use work.stream_slave_pkg.all;
+use work.stream_pkg.all;
 context work.com_context;
 context work.data_types_context;
 

vunit/vhdl/verification_components/src/axi_stream_master.vhd

@@ -9,7 +9,7 @@ use ieee.std_logic_1164.all;
 
 context work.vunit_context;
 context work.com_context;
-use work.stream_master_pkg.all;
+use work.stream_pkg.all;
 use work.axi_stream_pkg.all;
 use work.queue_pkg.all;
 use work.sync_pkg.all;

vunit/vhdl/verification_components/src/axi_stream_pkg.vhd

@@ -10,8 +10,7 @@ use ieee.std_logic_1164.all;
 use work.logger_pkg.all;
 use work.checker_pkg.all;
 use work.check_pkg.all;
-use work.stream_master_pkg.all;
-use work.stream_slave_pkg.all;
+use work.stream_pkg.all;
 use work.sync_pkg.all;
 context work.vunit_context;
 context work.com_context;

vunit/vhdl/verification_components/src/axi_stream_slave.vhd

@@ -9,7 +9,7 @@ use ieee.std_logic_1164.all;
 
 context work.vunit_context;
 context work.com_context;
-use work.stream_slave_pkg.all;
+use work.stream_pkg.all;
 use work.axi_stream_pkg.all;
 use work.sync_pkg.all;
 use work.string_ptr_pkg.all;