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Comments for DACs,ACs,and DAC-ADC. #22

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27 changes: 27 additions & 0 deletions ad5764_acbox.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -236,6 +236,9 @@ def connect(self,c,server,port):

@setting(200,clock_multiplier='i',returns='s')
def initialize(self,c,clock_multiplier):
"""
Initializes acbox. Clock multiplier must be larger than 4 and lower than 20.
"""
if (clock_multiplier < 4) or (clock_multiplier > 20):
returnValue("Error: clock multiplier must be between 4 and 20")
dev=self.selectedDevice(c)
Expand All @@ -246,32 +249,49 @@ def initialize(self,c,clock_multiplier):

@setting(201,returns='s')
def reset(self,c):
"""
This initializes the communications bus and loads the default values listed in the Table 8 in datasheet AD9854.
"""
dev = self.selectedDevice(c)
ans = yield dev.do_reset()
yield self.sigResetDone(ans)
returnValue(ans)

@setting(202,returns='s')
def identify(self,c):
"""
IDN? returns the string the device identification.
"""
dev = self.selectedDevice(c)
ans = yield dev.identify()
returnValue(ans)

@setting(203,returns='b')
def get_is_ready(self,c):
"""
RDY? returns the string "READY" when the DAC-ADC is ready for a new operation.
"""
dev = self.selectedDevice(c)
ans = yield dev.get_is_ready()
if ans == 'READY':returnValue(True)
returnValue(False)

@setting(204,returns='s')
def update_boards(self,c):
"""
Updates acbox values.
"""
dev = self.selectedDevice(c)
ans = yield dev.update_boards()
returnValue(ans)

@setting(300,channel='s',voltage='v',returns='s')
def set_voltage(self,c,channel,voltage):
"""
Sets channel voltage.
Channel must be one of X1,Y1,X2,Y2.
From 0 to 1, where 0 is zero scale and 1 is full scale.
"""
if not (channel in self.channels):
returnValue("Error: invalid channel. It must be one of X1,Y1,X2,Y2")
if (voltage > 1.0) or (voltage < 0.0):
Expand Down Expand Up @@ -300,6 +320,9 @@ def set_all(self,c,voltage):

@setting(302,offset='v',returns='s')
def set_phase(self,c,offset):
"""
Sets phase difference between boards.
"""
offset %= 360.0
dev = self.selectedDevice(c)
resp = yield dev.set_phase(offset)
Expand All @@ -310,6 +333,7 @@ def set_phase(self,c,offset):

@setting(303,frequency='v',returns='s')
def set_frequency(self,c,frequency):
"""Frequency cannot exceed 20MHz * clock_multiplier"""
if frequency <= 0:
returnValue("Error: frequency cannot be zero (or less.)")
if frequency > (self.clock_multiplier * 20000000):
Expand All @@ -323,6 +347,9 @@ def set_frequency(self,c,frequency):

@setting(400,channel='s',returns='v')
def get_voltage(self,c,channel):
"""
Channel must be one of X1,Y1,X2,Y2.
"""
if not (channel in self.channels):
returnValue("Error: invalid channel. It must be one of X1,Y1,X2,Y2")
dev = self.selectedDevice(c)
Expand Down
8 changes: 7 additions & 1 deletion ad5764_dcbox.py
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Original file line number Diff line number Diff line change
Expand Up @@ -151,7 +151,9 @@ def connect(self,c,server,port):

@setting(200,port='i',voltage='v',returns='s')
def set_voltage(self,c,port,voltage):
"""Sets the voltage at <port> to <voltage>"""
"""
SET sets a voltage to a channel and returns the channel and the voltage it set.
"""
if not (port in self.validPorts):
returnValue("Error: invalid port. Port must be from 0 to 7.")
if (voltage>10) or (voltage < -10):
Expand Down Expand Up @@ -180,6 +182,9 @@ def set_all_voltages(self,c,voltage):

@setting(210,port='i',returns='v')
def get_voltage(self,c,port):
"""
GET_DAC returns the voltage output by a DAC channel.
"""
if not (port in self.validPorts):
returnValue("Error: invalid port. Port must be from 0 to 7.")
dev = self.selectedDevice(c)
Expand All @@ -188,6 +193,7 @@ def get_voltage(self,c,port):

@setting(211,returns='*v')
def get_all(self,c):
"""Gets all ports voltages"""
ans = []
dev = self.selectedDevice(c)
for port in self.validPorts:
Expand Down
27 changes: 27 additions & 0 deletions ad9854_acbox.py
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Original file line number Diff line number Diff line change
Expand Up @@ -236,6 +236,9 @@ def connect(self,c,server,port):

@setting(200,clock_multiplier='i',returns='s')
def initialize(self,c,clock_multiplier):
"""
Initializes acbox. Clock multiplier must be larger than 4 and lower than 20.
"""
if (clock_multiplier < 4) or (clock_multiplier > 20):
returnValue("Error: clock multiplier must be between 4 and 20")
dev=self.selectedDevice(c)
Expand All @@ -246,32 +249,49 @@ def initialize(self,c,clock_multiplier):

@setting(201,returns='s')
def reset(self,c):
"""
This initializes the communications bus and loads the default values listed in the Table 8 in datasheet AD9854.
"""
dev = self.selectedDevice(c)
ans = yield dev.do_reset()
yield self.sigResetDone(ans)
returnValue(ans)

@setting(202,returns='s')
def identify(self,c):
"""
IDN? returns the string the device identification.
"""
dev = self.selectedDevice(c)
ans = yield dev.identify()
returnValue(ans)

@setting(203,returns='b')
def get_is_ready(self,c):
"""
RDY? returns the string "READY" when the DAC-ADC is ready for a new operation.
"""
dev = self.selectedDevice(c)
ans = yield dev.get_is_ready()
if ans == 'READY':returnValue(True)
returnValue(False)

@setting(204,returns='s')
def update_boards(self,c):
"""
Updates acbox values.
"""
dev = self.selectedDevice(c)
ans = yield dev.update_boards()
returnValue(ans)

@setting(300,channel='s',voltage='v',returns='s')
def set_voltage(self,c,channel,voltage):
"""
Sets channel voltage.
Channel must be one of X1,Y1,X2,Y2.
From 0 to 1, where 0 is zero scale and 1 is full scale.
"""
if not (channel in self.channels):
returnValue("Error: invalid channel. It must be one of X1,Y1,X2,Y2")
if (voltage > 1.0) or (voltage < 0.0):
Expand All @@ -298,6 +318,9 @@ def set_all(self,c,voltage):

@setting(302,offset='v',returns='s')
def set_phase(self,c,offset):
"""
Sets phase difference between boards.
"""
offset %= 360.0
dev = self.selectedDevice(c)
resp = yield dev.set_phase(offset)
Expand All @@ -307,6 +330,7 @@ def set_phase(self,c,offset):

@setting(303,frequency='v',returns='s')
def set_frequency(self,c,frequency):
"""Frequency cannot exceed 20MHz * clock_multiplier"""
if frequency <= 0:
returnValue("Error: frequency cannot be zero (or less.)")
if frequency > (self.clock_multiplier * 20000000):
Expand All @@ -319,6 +343,9 @@ def set_frequency(self,c,frequency):

@setting(400,channel='s',returns='v')
def get_voltage(self,c,channel):
"""
Channel must be one of X1,Y1,X2,Y2.
"""
if not (channel in self.channels):
returnValue("Error: invalid channel. It must be one of X1,Y1,X2,Y2")
dev = self.selectedDevice(c)
Expand Down
25 changes: 19 additions & 6 deletions dac_adc.py
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Original file line number Diff line number Diff line change
Expand Up @@ -210,7 +210,7 @@ def set_voltage(self,c,port,voltage):
@setting(104,port='i',returns='v[]')
def read_voltage(self,c,port):
"""
GET_ADC returns the voltage read by an input channel. Do not confuse with GET_DAC; GET_DAC has not been implemented yet.
GET_ADC returns the voltage read by an input channel of the adc.
"""
dev=self.selectedDevice(c)
if not (port in range(4)):
Expand Down Expand Up @@ -248,8 +248,8 @@ def ramp2(self,c,port1,port2,ivoltage1,ivoltage2,fvoltage1,fvoltage2,steps,delay
@setting(107,dacPorts='*i', adcPorts='*i', ivoltages='*v[]', fvoltages='*v[]', steps='i',delay='v[]',nReadings='i',returns='**v[]')#(*v[],*v[])')
def buffer_ramp(self,c,dacPorts,adcPorts,ivoltages,fvoltages,steps,delay,nReadings=1):
"""
BUFFER_RAMP ramps the specified output channels from the initial voltages to the final voltages and reads the specified input channels in a synchronized manner.
It does it within an specified number steps and a delay (microseconds) between the update of the last output channel and the reading of the first input channel.
BUFFER_RAMP ramps the specified output channels from the initial voltages to the final voltages and reads the specified input channels every $steps.
It does it within an specified number steps and a delay between the update of the last output channel and the reading of the first input channel.
"""
dacN = len(dacPorts)
adcN = len(adcPorts)
Expand Down Expand Up @@ -316,8 +316,8 @@ def buffer_ramp(self,c,dacPorts,adcPorts,ivoltages,fvoltages,steps,delay,nReadin
@setting(108,dacPorts='*i', adcPorts='*i', ivoltages='*v[]', fvoltages='*v[]', steps='i',delay='v[]',nReadings='i',adcSteps='i',returns='**v[]')#(*v[],*v[])')
def buffer_ramp_dis(self,c,dacPorts,adcPorts,ivoltages,fvoltages,steps,delay,adcSteps,nReadings=1):
"""
BUFFER_RAMP ramps the specified output channels from the initial voltages to the final voltages and reads the specified input channels in a synchronized manner.
It does it within an specified number steps and a delay (microseconds) between the update of the last output channel and the reading of the first input channel.
BUFFER_RAMP_DIS ramps the specified output channels from the initial voltages to the final voltages and reads the specified input channels every $adcSteps.
It does it within an specified number steps and a delay between the update of the last output channel and the reading of the first input channel.
"""

if steps%adcSteps:
Expand Down Expand Up @@ -406,7 +406,7 @@ def set_conversionTime(self,c,channel,time):
@setting(110,returns='s')
def id(self,c):
"""
IDN? returns the string.
IDN? returns the string the device identification.
"""
dev=self.selectedDevice(c)
yield dev.write("*IDN?\r")
Expand Down Expand Up @@ -523,6 +523,19 @@ def dac_full_scale(self,c,voltage):
ans = yield dev.read()
returnValue(ans)

@setting(121,port='i',returns='v[]')
def get_voltage(self,c,port):
"""
GET_DAC returns the voltage output by a DAC channel.
"""
dev=self.selectedDevice(c)
if not (port in range(4)):
returnValue("Error: invalid port number.")
return
yield dev.write("GET_DAC,%i\r"%port)
ans = yield dev.read()
returnValue(float(ans))

@setting(9002)
def read(self,c):
dev=self.selectedDevice(c)
Expand Down
25 changes: 23 additions & 2 deletions quad_ad5780.py
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -199,6 +199,9 @@ def connect(self,c,server,port):

@setting(102,returns='s')
def initialize(self,c):
"""
Initializes DACs
"""
dev=self.selectedDevice(c)
dev.clearOutput()
ans_init = yield dev.do_init()
Expand All @@ -213,7 +216,9 @@ def initialize(self,c):

@setting(103,port='i',voltage='v',returns='s')
def set_voltage(self,c,port,voltage):
#print(dir(c))
"""
SET sets a voltage to a channel and returns the channel and the voltage it set.
"""
if not (port in self.ports):
returnValue("Error: invalid port. It must be 0,1,2, or 3")
if (voltage > 10) or (voltage < -10):
Expand All @@ -226,6 +231,9 @@ def set_voltage(self,c,port,voltage):

@setting(104,port='i',returns='s')
def get_voltage(self,c,port):
"""
GET_DAC returns the voltage output by a DAC channel.
"""
if not (port in self.ports):
returnValue("Error: invalid port. It must be 0,1,2, or 3")
dev = self.selectedDevice(c)
Expand All @@ -235,7 +243,10 @@ def get_voltage(self,c,port):

@setting(105,port='i',ivoltage='v',fvoltage='v',steps='i',delay='i',returns='s')
def ramp1(self,c,port,ivoltage,fvoltage,steps,delay):

"""
RAMP1 ramps one channel from an initial voltage to a final voltage within an specified number steps and a delay (microseconds) between steps.
When the execution finishes, it returns "RAMP_FINISHED".
"""
if not (port in self.ports):
returnValue("Error: invalid port. It must be 0,1,2, or 3")
if (ivoltage>10) or (ivoltage<-10):
Expand All @@ -255,6 +266,10 @@ def ramp1(self,c,port,ivoltage,fvoltage,steps,delay):

@setting(106,port1='i',port2='i',ivoltage1='v',ivoltage2='v',fvoltage1='v',fvoltage2='v',steps='i',delay='i',returns='s')
def ramp2(self,c,port1,port2,ivoltage1,ivoltage2,fvoltage1,fvoltage2,steps,delay):
"""
RAMP2 ramps one channel from an initial voltage to a final voltage within an specified number steps and a delay (microseconds) between steps. The # of steps is the total number of steps, not the number of steps per channel.
When the execution finishes, it returns "RAMP_FINISHED".
"""
if not (port1 in self.ports):
returnValue("Error: invalid port1. It must be 0,1,2, or 3")
if (ivoltage1>10) or (ivoltage1<-10):
Expand All @@ -280,13 +295,19 @@ def ramp2(self,c,port1,port2,ivoltage1,ivoltage2,fvoltage1,fvoltage2,steps,delay

@setting(107,returns='s')
def id(self,c):
"""
IDN? returns the string the device identification.
"""
dev = self.selectedDevice(c)
dev.clearOutput()
ans = yield dev.identify()
returnValue(ans)

@setting(108,returns='s')
def ready(self,c):
"""
RDY? returns the string "READY" when the DAC-ADC is ready for a new operation.
"""
dev = self.selectedDevice(c)
dev.clearOutput()
ans = yield dev.get_is_ready()
Expand Down