examples: async isend/irecv semantics over NIXL #1156
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Add example demonstrating MPI-like isend/irecv semantics over NIXL. Uses sender-initiated WRITE transfers with notification-based coordination for matching send/recv pairs by tag and sequence number. Can serve as a reference for applications using isend/irecv semantics, such as weight transfer in vLLM. Signed-off-by: Itay Alroy <ialroy@nvidia.com>
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👋 Hi itayalroy! Thank you for contributing to ai-dynamo/nixl. Your PR reviewers will review your contribution then trigger the CI to test your changes. 🚀 |
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@itayalroy CI error is relevant |
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Add example demonstrating MPI-like isend/irecv semantics over NIXL.
Uses sender-initiated WRITE transfers with notification-based coordination for matching send/recv pairs by tag and sequence number.
Can serve as a reference for applications using isend/irecv semantics, such as weight transfer in vLLM.