Add support for external-FET SMPSs

[cs42]

Summary

High-current SMPS designs often use a controller plus external FETs, a sense shunt, and an inductor. FYPA’s existing REGULATOR model assumes the current boundaries sit on the IC itself (internal FETs). If you instead annotate the power path as a plain SERIES chain (VIN → HS → L → HS → VOUT) while both rails are voltage-forced, the solver effectively shorts the rails through RDSon — which is exactly wrong for IR / copper analysis where the interesting current is large.
This PR extends the same VoltageRegulator MNA element so those stages work properly:

• New role PDN_ROLE=PATH on FETs / shunt / inductor (PDN_R + optional pin filters).
• Stage map on the REGULATOR host: PDN_SMPS_TOPOLOGY, PDN_SW1_NET / PDN_SW2_NET, usual IN_* / OUT_*.
• Auto host bind and path classification from pad–net intersection (PDN_SMPS_HOST only when ambiguous).
• Inductor = cut (no SW1↔SW2 rail merge); HS/shunt = island SERIES bridges; LS = averaged k·i_v stamps (not SERIES to GND).
• Topologies: BUCK / BOOST / BUCKBOOST, plus INVERTER for multi-phase / motor-style drivers that share the same “don’t SERIES-star the bus” problem but are not a voltage step-up/down.

So the feature is aimed at external-FET SMPS (especially high current), and as a side effect cleans up related external-FET architectures that previously needed weaker equivalents.
Docs: user guide § regulators (PATH / host vs part params) and README role table. Tests cover bind/cut, buck/boost coeffs, INVERTER, Kelvin shunt, ambiguous host, and internal-FET regression.

Test plan

• uv run pytest tests/test_smps_external_path.py tests/test_regulator_direction.py
• uv run ruff check . and uv run ty check
• Annotate a buck-boost with external FETs (PATH + host SW1/SW2); confirm VIN and VOUT stay separate rails and path currents look plausible
• Smoke INVERTER multi-phase REGULATOR: DC bus and phase nets are not one SERIES mega-rail
• Regression: REGULATOR without PATH parts behaves as today’s internal-FET SMPS