Welcome to CIS 351!

This is the main website for the course. The slides, schedule, and links to assignments, labs, projects, as well as the official course policies, will be posted here. The course also uses other websites for specific purposes.

• Piazza is a question-and-answer forum. All official announcements will be sent through Piazza, and you are responsible for monitoring Piazza to keep up to date with announcements (Piazza by default will send an email when an announcement is posted).
  • You can read the following Piazza FAQ if you have questions.
• Prairielearn is where you will submit all of your assignments, labs, and projects. After submitting labs to Prairielearn, don't forget to update the "Grade me" spreadsheet as described in the syllabus.
• ClassTranscribe is where the videos will be hosted.

That seems like a lot to monitor, but don't worry -- you really need only actively follow Piazza. I will release announcements there any time assignments or videos are assigned, and I will post links to them directly on this page.

Be sure to read through the syllabus for course policies, contact information, and other important info.

Schedule

** Note: This is an estimated timeline and subject to change. **

Week	Topics	Activities	Deliverables
1	Introduction intro slides Combinational circuits circuits slides circuit representation slides conversion slides SOP & PLA slides logical completeness slides	In-class Activities	Syllabus quiz Lab partner survey
2	Binary numbers intro slides usage slides tricks/tips slides Negative binary numbers sign-magnitude slides two's complement slides overflow slides Boolean algebra simplification slides Ripple-carry adder half adder slides ripple-carry adder slides Circuit Timing circuit timing slides	In-class Activities	Lab 1 -- Introduction to DLUnit HW1: Combinational circuits -- Friday, Sep. 9 (recommended)
3	Ripple-Carry Timing ripple-carry timing slides Multiplexors multiplexor slides Carry-select adder carry-select slides part 1 carry-select slides part 2 Carry-lookahead adder carry-lookahead slides part 1 carry-lookahead slides part 2	In-class Activities Practice Midterm 1 Practice Midterm 1 Solutions System-check exam System-check exam (timed)	Lab 2 -- First breadboard lab HW2: Boolean Algebra -- Friday, Sep. 16 (recommended)
4	Karnaugh Maps k-map slides Latches latches slides	In-class Activities	First Midterm -- Tuesday, Sep. 20 (in lab) Lab 3 -- Building adder lab
5	Flip-flops Synchronous sequential circuits flip-flop slides synchronous sequential slides timing sequential slides Pipelining pipelining slides	In-class Activities	Project 1 -- Friday, Sep. 30 (standard credit)
6	Turning circuits into computers automatic computer	Handout: Building a computer Practice Midterm 2 Practice Midterm 2 Solutions	Lab 4 -- Sequential circuits HW3: Sequential Circuits -- Friday, Oct. 7 (recommended)
7	Computer Architecture architecture R-type microarchitecture R-type datapath I-type instructions I-type Implementing arithmetic I-type Branches conditional branching	In-class Activities	Second Midterm -- Monday, Oct. 10 (in lab) Project 2 -- Wednesday, Oct. 12 Friday, Oct. 14 (standard credit)
8	Unconditional branch (jump) jump Assembly programming constructs conditionals (if statements) loops Branch microarchitecture Implementing branches Memory load/store memory instructions Implementing load and store	In-class Activities	Lab 5: Assembly Intro
9	Control logic Control logic Arrays arrays arrays and loops Functions functions	Memory handout Practice Exam 3 Practice Exam 3 Solutions	Lab 6 -- Branches HW4: Architecture and Microarchitecture -- Friday, Oct. 28
10	Stack stack recursion	In-class Activities	Third Midterm -- Tuesday, Nov. 1
11	Memory memory map loading and executing Programming with memory data segment code heap code generic debugging code stack vs heap vs global (optional -- no video) Cache motivation cache motivation Direct-mapped cache direct-mapped cache	In-class Activities Direct-mapped Cache Handout Practice Exam 4 Practice Exam 4 Solutions	Project 3 -- Wednesday, Nov. 9 (standard credit)
12	Cache conflicts cache conflicts Associative cache associative cache mapping associative cache conflicts (LRU) Varying block size in cache mapping with larger block sizes blocks of addresses associativity vs block size and address bits	In-class Activities Set-associative cache handout	Fourth Midterm -- Tuesday, November 15 HW5: Stack and Microarchitecture -- Monday, November 14 (recommended) Loops and Recursion lab -- Tuesday Nov. 15 (recommended)
13	Cache performance cache performance	In-class Activities	Fourth Midterm -- Tuesday, November 22 Computer Instruction Types lab -- Tuesday, November 22 (recommended)
14	Basic pipelining in MIPS pipeline intro pipeline performance	In-class Activities	HW6: Cache -- Friday, Dec. 2 (recommended)
15	Data and Control Hazards data hazards control hazards	In-class Activities Practice final Practice final solutions	Cache Lab -- Tuesday, December 6 (Recommended) Pipeline lab
16	Final Exam 8 AM section -- Monday, Dec. 12 @ 8-9:50 AM in EOS 4 PM section -- Wednesday, Dec. 14 @ 4-5:50 PM in EOS

Useful links

• MIPS Reference Sheet
• Prof. Kurmas's Videos