RISC-V ISEs for multi-precision integer arithmetic

Overview

Organisation

├── bin                     - scripts (e.g., environment configuration)
├── build                   - working directory for build
├── doc                     - documentation
└── src                     - source code
    ├── sw                  - source code for software
    └── sw-toolchain        - source code for software tool-chain

Usage

• Options which use a RISC-V baseline ISA plus custom ISE do so via the .insn directive, rather than an invasive change to binutils itself.

• Clone the repo.

  git clone https://github.com/bristolcrypto/mpise.git ./mpise
  cd ./mpise
  git submodule update --init --recursive
  source ./bin/conf.sh

  This initializes the environment variables REPO_HOME, RISCV_SPIKE, and RISCV_CVA6: note that two RISC-V toolchains are used, with one installed in ${RISCV_SPIKE} (for simulation using spike) and one installed in ${RISCV_CVA6} (for simulation of CVA6-MPISE using verilator).

• Fix configuration, e.g.,

  • one option from

    export MPISE_DESTRUCTIVE="0"
    export MPISE_DESTRUCTIVE="1"

    to disable (resp. enable) destructive instruction variants.

  • one option from

    export MPISE_STATELESS="0"
    export MPISE_STATELESS="1"

    to disable (resp. enable) stateless instruction variants.

• Fix paths, e.g.,

  export CVA6="${REPO_HOME}/build/cva6"

• Clone the associated, CVA6-based core repo. into ${CVA6}:

  git clone https://github.com/bristolcrypto/mpise-cva6.git ${REPO_HOME}/build/cva6
  cd ${REPO_HOME}/build/cva6
  git checkout mpise-full
  git submodule update --init --recursive  

  noting this is a fork of https://github.com/openhwgroup/cva6.git.

• Build a multi-architecture tool-chain into ${RISCV_SPIKE}:

  git clone https://github.com/riscv/riscv-gnu-toolchain.git ${REPO_HOME}/build/riscv-gnu-toolchain
  cd ${REPO_HOME}/build/riscv-gnu-toolchain
  sed -i '/shallow = true/d' .gitmodules
  sed -i 's/--depth 1//g' Makefile.in
  ./configure --prefix="${RISCV_SPIKE}" --enable-multilib --with-multilib-generator="rv32gc-ilp32--;rv64gc-lp64--"
  make

  noting that the sed lines are to deal with an issue related to shallow cloning sub-modules.

• Build an ISE-enabled tool-chain, including spike and associated pk, via

  make sw-toolchain-build

  Note that since said tool-chain is patch-based, making changes to it is somewhat tricky. The idea, for each component, (i.e., pk and spike) referred to as ${COMPONENT} is as follows:

  • perform a fresh clone of the component repository,
  • apply the existing patch to the cloned component repository,
  • implement the change in the cloned component repository,
  • stage the change via git add, but do not commit it, in the cloned component repository,
  • execute ${COMPONENT}-update.sh to produce an updated patch,
  • optionally commit and push the updated patch.

• Execute software simulation:

  ALG="intmul" ARCH="rv64" TYPE="isa" RADIX="64" PLATFORM="spike" make sw-clean sw-build sw-run # ISA-based,    full-radix (i.e., 64-bit)
  ALG="intmul" ARCH="rv64" TYPE="ise" RADIX="64" PLATFORM="spike" make sw-clean sw-build sw-run # ISE-based,    full-radix (i.e., 64-bit)
  ALG="intmul" ARCH="rv64" TYPE="isa" RADIX="51" PLATFORM="spike" make sw-clean sw-build sw-run # ISA-based, reduced-radix (i.e., 51-bit)
  ALG="intmul" ARCH="rv64" TYPE="ise" RADIX="51" PLATFORM="spike" make sw-clean sw-build sw-run # ISE-based, reduced-radix (i.e., 51-bit)
  
  ALG="x25519" ARCH="rv64" TYPE="isa" RADIX="64" PLATFORM="spike" make sw-clean sw-build sw-run # ISA-based,    full-radix (i.e., 64-bit)
  ALG="x25519" ARCH="rv64" TYPE="ise" RADIX="64" PLATFORM="spike" make sw-clean sw-build sw-run # ISE-based,    full-radix (i.e., 64-bit)
  ALG="x25519" ARCH="rv64" TYPE="isa" RADIX="51" PLATFORM="spike" make sw-clean sw-build sw-run # ISA-based, reduced-radix (i.e., 51-bit)
  ALG="x25519" ARCH="rv64" TYPE="ise" RADIX="51" PLATFORM="spike" make sw-clean sw-build sw-run # ISE-based, reduced-radix (i.e., 51-bit)

Acknowledgements

This work has been supported in part by EPSRC via grant EP/R012288/1 (under the RISE programme), and by Innovate UK via grant 10065634.