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topology: add PCIe chain and IRQ info to device hints - #761

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topology: add PCIe chain and IRQ info to device hints#761
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kad:irq

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@kad kad commented Aug 21, 2026

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Device topology hints only exposed CPU/NUMA/socket affinity. Add PCIeChain and IRQs fields to Hint so callers can see the PCIe bridge/root hierarchy above a device and which interrupts it uses.

  • Add a PCIeHopType enum (PCIeHopBridge, PCIeHopRoot) and a PCIeHop struct for each ancestor in the chain.
  • Walk the device's ancestor directories in sysfs to build the chain: a class 0x0604 device is a bridge, and the top-level pci: directory is the root.
  • Read a device's legacy irq file and its msi_irqs/ entries to collect IRQ numbers.
  • Extend Hint.String() to print the new IRQs.
  • Update the test-data.tar.gz fixture with a bridge-to-endpoint PCI chain and legacy/MSI IRQ entries; add TestPcieChain and TestDeviceIRQs.

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kad requested a balanced review from Copilot August 21, 2026 08:34

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Pull request overview

Adds PCIe ancestry and IRQ metadata to device topology hints.

Changes:

  • Introduces PCIe hop types and ancestor-chain discovery.
  • Collects legacy and MSI IRQs and displays them in hints.
  • Adds topology tests and corrects hint logging.

Reviewed changes

Copilot reviewed 3 out of 4 changed files in this pull request and generated 1 comment.

File Description
pkg/topology/topology.go Adds PCIe and IRQ hint collection.
pkg/topology/topology_test.go Tests PCIe chains and device IRQs.
cmd/plugins/topology-aware/policy/resources.go Logs formatted topology hints.

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Comment thread pkg/topology/topology.go

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Pull request overview

Copilot reviewed 4 out of 5 changed files in this pull request and generated no new comments.

Suppressed comments (1)

pkg/topology/topology.go:219

  • These values are still discarded when a device has no CPU/NUMA/socket affinity: NewTopologyHints only retains a hint under the legacy-field predicate at lines 321-323. Thus PCI devices without those affinity files (and IRQ-only devices) still return an empty Hints, so callers cannot access the new metadata. Treat a non-empty PCIeChain or IRQs as sufficient to retain the hint, and cover that case in the integration test.
	hint.PCIeChain = pcieChain(sysFSPath)
	hint.IRQs = deviceIRQs(sysFSPath)

Device topology hints only exposed CPU/NUMA/socket affinity. Add
PCIeChain and IRQs fields to Hint so callers can see the PCIe
bridge/root hierarchy above a device and which interrupts it uses.

- Add a PCIeHopType enum (PCIeHopBridge, PCIeHopRoot) and a PCIeHop
  struct for each ancestor in the chain.
- Walk the device's ancestor directories in sysfs to build the chain:
  a class 0x0604 device is a bridge, and the top-level pci<domain>:<bus>
  directory is the root.
- Read a device's legacy irq file and its msi_irqs/ entries to collect
  IRQ numbers.
- Extend Hint.String() to print the new IRQs.
- Update the test-data.tar.gz fixture with a bridge-to-endpoint PCI
  chain and legacy/MSI IRQ entries; add TestPcieChain and
  TestDeviceIRQs.

Signed-off-by: Alexander Kanevskiy <alexander.kanevskiy@intel.com>
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