Bluetooth: controller: Generate lost ISO data for CIS Rx#7
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I've analyzed the LLL layer files and documented how sequential and interleaved packing are supported. Key Finding: Unlike BIS which requires separate channel calculation functions ( subevent_time = offset + (sub_interval * se_curr)The ULL layer sets different
Changes made (commit 2a798c5):
The LLL code doesn't need separate conditional compilation paths because the scheduling logic is generic and parameterized by ULL. The conditional compilation is already in place at the ULL layer where the packing-specific offset and sub_interval calculations occur. |
ASM is notoriously harder to maintain than C and requires core specific adaptation which impairs even more the readability of the code. There's a bug in current arch_cpu_atomic_idle asm version: tst x0, #(DAIF_IRQ_BIT) //here Z := (DAIF_IRQ_BIT == 0) beq _irq_disabled //jump to _irq_disabled when Z is set msr daifclr, #(DAIFCLR_IRQ_BIT) _irq_disabled: ret As can be seen, the asm code jumps to _irq_disabled when Z is set, but per aarch64 architecture reference, DAIF_IRQ == 0 means the IRQ is unmasked, I.E enabled. So the asm logic here is wrong. I fixed this bug in C version. This shows the benefit of ASM -> C As for performance concern, except the bug fix above, there's no difference of generated code between ASM and C version. ASM version: <arch_cpu_idle>: d5033f9f dsb sy d503207f wfi d50342ff msr daifclr, #0x2 d65f03c0 ret arch_cpu_atomic_idle>: d50342df msr daifset, #0x2 d5033fdf isb d503205f wfe f279001f tst x0, #0x80 54000040 b.eq 1001d10 <_irq_disabled> // b.none d50342ff msr daifclr, #0x2 _irq_disabled>: d65f03c0 ret C version: <arch_cpu_idle>: d5033f9f dsb sy d503207f wfi d50342ff msr daifclr, #0x2 d65f03c0 ret <arch_cpu_atomic_idle>: d50342df msr daifset, #0x2 d5033fdf isb d503205f wfe 37380040 tbnz w0, #7, 1001d0c <arch_cpu_atomic_idle+0x14> d50342ff msr daifclr, #0x2 d65f03c0 ret And as can be seen, C version use the tbnz instruction to test bit and branch. Unlike TST, TBNZ does not affect the Z, N, C, or V flags in the processor state. So except the bug fix, C version looks a bit better than asm version. Other architectures such as x86, riscv, rx, xtensa, mips and even arm cortex_m also use c version for cpu_idle, it's safe for ASM -> C. Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
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Add CONFIG_LOG_MULTI_SLOT option that allows routing log messages from different CPU cores into separate debug window slots. Each core gets its own mtrace slot, enabling the host to read per-core log data independently. Key changes: - Add CONFIG_LOG_MULTI_SLOT Kconfig option (depends on SMP, INTEL_ADSP_DEBUG_SLOT_MANAGER and LOG_CORE_ID_PREFIX) - Allocate per-core debug window slots in mtrace_init() - Route log output to the correct slot based on originating core ID using log_output context mechanism Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The cm7 variant chose DTCM as zephyr,sram while also selecting it as zephyr,dtcm, and chose ITCM as zephyr,flash while also selecting it as zephyr,itcm. Aliasing one region to both a generic role and its TCM role makes the linker emit the .dtcm_* (and .itcm) section groups at the TCM region origin, on top of the regular .data/.bss/iterable sections that already start there. The boot-time .dtcm_bss zeroing then wipes the overlapping initialized data: an RTIO iodev's api pointer becomes NULL, so iodev->api->submit() calls through a bogus RAM address and the core takes an MPU instruction-access violation. Reproduced on hardware with tests/subsys/rtio/workq (rtio.workq.rtio_work.work_decouples_submission). This is the same root cause as the frdm_imxrt1186 report in zephyrproject-rtos#110248, on the superset MIMXRT1180-EVK. DTCM already is zephyr,sram and ITCM already is zephyr,flash on this variant, so the separate TCM section groups are both redundant and harmful. Drop the redundant zephyr,dtcm and zephyr,itcm chosen entries and guard the board's cm7 DTCM_SECTION linker snippet with a dt_chosen() check so it is only added when a dedicated DTCM is selected. The cm33 variant is unaffected (sram is hyperram and flash is external, with DTCM/ITCM as genuinely separate regions). Verified on mimxrt1180_evk/mimxrt1189/cm7 via LinkServer: after the fix dummy_iodev.api reads back non-NULL and the rtio workq submit path runs without faulting. Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
1. Move function pinmux_lpcmp0 into common pinctrl file 2. Enable LPCMP use case on NXP mcx_n5xx_evk board Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
Clarify the explanation regarding DMA2D / LVGL alignments are use configdefault instead of config for LV_DRAW_DMA2D_HAL_INCLUDE Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
…on.dtsi" This reverts commit 649ed5a. Temporarily disable the DMA2D on STM32N6 due to regression in LVGL applications. Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
The backtrace code was either calling the arch exception dump hook or printk based on the value of its own config called CONFIG_XTENSA_BACKTRACE_EXCEPTION_DUMP. However, this made fault output inconsistent when CONFIG_LOG is enabled because other output (like xtensa_dump_stack()) would use the macro EXCEPTION_DUMP(), which would use LOG_ERR instead of printk. Fault output would be a mix of log lines for register dumps and printk lines for backtrace (no domains, timestamps, etc). This commit changes backtrace to use the EXCEPTION_DUMP() macro so output now is consistent. It also fixes an issue where if printk was going to the logging subsystem (CONFIG_LOG_PRINTK=y), because the printk calls in backtrace had no '\n' termination, the output would be lost in the log format buffer. Signed-off-by: Mike J. Chen <mjchen@google.com>
The same index `i` was used for `servers` and `ctx->servers`, but since these may be different, this resulted in strange entries in the log; for example, mDNS was displayed for non-mDNS servers. Signed-off-by: Gerhard Jörges <joerges@metratec.com>
Some private symbol names were widely duplicated throughout the kernel such as lock and handle_poll_event. This arguably made the kernel less readable as the locality of the name lock is highly confusing. Rename all compilation unit locks to match their usage (e.g. mutex_lock). Improving readability. Furthermore, by deduplicating these symbols we enable potential amalgamation builds of the kernel where all C files are merged into one large C file or compliation unit allowing for better compiler visibility and optimization. Signed-off-by: Tom Burdick <thomas.burdick@infineon.com>
Increase CONFIG_ZTEST_STACK_SIZE from 1024 to 4096 to provide sufficient stack space for the test execution and prevent overflow. Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
This is not a kernel feature, mostly this is implemented on the arch/ level. Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add Doxygen traceability documentation to the cache management API test cases. Each framework-invoked ZTEST entry now carries a @brief/@details block describing the observable behavior under test (every operation must return 0 or -ENOTSUP) along with @see links to the APIs it exercises. The documentation is grouped under a tests_arch_cache_api module ingrouped in all_tests so it shows up in the traceability report without mixing into the API docs. Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The data-cache test exercised flush_all and flush_and_invd_all but never invalidate-all, even though the instruction-cache test covers its instr_invd_all counterpart. Add the missing call so the whole public data-cache maintenance surface follows the same 0/-ENOTSUP return contract check. The invalidate is issued after a flush_all so it cannot discard dirty lines the test framework still depends on. Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove the assertion in eth_stm32_hal_v1.c recently introduce between byte array sizes storing MAC address value. It was useless since both byte array sizes are based on NET_ETH_ADDR_LEN macro. Moreover the assertion may produce a build warning as reported (and fixed) in eth_stm32_hal_v2.c by commit 0ee22dc ("drivers: ethernet: stm32: fix clang error"). Factorize the 2 build assertions in eth_stm32_hal2.c with an explicit comment why it's used. Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Bring the context test documentation in line with the test documentation conventions: rename the Doxygen module from kernel_context_tests to the tests_-prefixed tests_kernel_context so it groups under all_tests consistently, and rewrite the remaining cases that still used the older "Test Objective / Testing techniques / Pass/Fail criteria" format into the concise @details / Test steps / Expected result template already used by the rest of the file. Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
test_thread was effectively a no-op. Its worker, kernel_thread_entry(), blocked on k_sem_take(&sem_thread, K_FOREVER) before running any checks, but the test never gave that semaphore. The worker only reached _test_kernel_thread() because test_k_yield(), which runs earlier in the same suite, happened to leak a semaphore count of one - a fragile ordering dependency that silently dropped all coverage when the test ran in isolation. The body itself contained no assertions and did not join the worker, so a worker that blocked forever still passed. The parent thread id was also passed as NULL, making the worker's "id differs from spawner" check trivially true. Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
irq_lock() reentrancy was only exercised indirectly via the spinlock tests; the context suite checked a single lock/unlock level only. Add test_irq_lock_nested to verify the key property of nested locking: a nested irq_lock() keeps interrupts masked, balancing the inner key must NOT re-enable them while the outer lock is held, and only the unlock balancing the outermost lock restores the original state. arch_cpu_irqs_are_enabled() is used as the observable at each step, extending the single-level coverage already provided by test_arch_cpu_irqs_are_enabled. Verified on native_sim, qemu_x86, qemu_cortex_m3 and qemu_riscv32. Signed-off-by: Anas Nashif <anas.nashif@intel.com> Assisted-by: Claude:claude-opus-4-8
Close two minor coverage gaps in the context suite: - k_can_yield() was only checked incidentally inside other tests, so it had no named traceability entry. Add test_k_can_yield, asserting it is true in thread context and false in an irq_offload() ISR handler. - The conditional skips in test_cpu_idle(_atomic), test_interrupts and test_timer_interrupts were silent. Print the reason before ztest_test_skip() so reports show why a platform skipped instead of reading as covered. Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In streaming mode the application does not supply a buffer in the adc_sequence; sample data is written into a buffer allocated from the RTIO mempool inside the ISR. Skip the sequence buffer size validation in start_read() when CONFIG_ADC_STREAM is enabled, which otherwise fails with a spurious -ENOMEM "Provided buffer is too small" error. Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Fix the address value and interrupt number to match the reference manual. Signed-off-by: Julien Racki <julien.racki-ext@st.com>
On Windows, if the working directory and source directory are on different drive letters, `os.path.relpath` will throw `ValueError: path is on mount 'D:', start on mount 'C:'` This adds a fallback to use `self.source_dir` in that case, as `srcrel` is only used in the printout of the checks below, so does not need to be relative to the working directory Signed-off-by: William Vinnicombe <william.vinnicombe@raspberrypi.com>
The kconfig_style.py script generates this file, but it is not meant to ever be commited. Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Initial conditional compilation towards CIS interleaved packing support. The fix sets lazy_active before active, ensuring that whenever the ticker callback observes active=1, lazy_active already contains the correct compensation value. Assisted-by: GitHub CoPilot: Claude Opus 4.6 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add interleaved subevent traversal to lll_central_iso.c, gated by CONFIG_BT_CTLR_CONN_ISO_INTERLEAVED. When packing is interleaved, the LLL performs round-robin traversal across CISes per subevent round instead of completing all subevents of one CIS before the next. Per-CIS channel PRN state is saved/restored when switching between CISes. Finalization (payload_count_flush_or_inc_on_close) is deferred to isr_done where all CISes are finalized together. Assisted-by: GitHub CoPilot: Claude Opus 4.6 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add interleaved CIS subevent scheduling to the peripheral LLL ISO state machine, gated by CONFIG_BT_CTLR_CONN_ISO_INTERLEAVED. Changes to lll_peripheral_iso.c: - Add static per-CIS interleaved state arrays (PRN, subevent counters, closed bitmask) matching the central implementation - Initialize interleaved state for all active CISes in prepare_cb - Add round-robin CIS traversal in isr_rx scheduling section: after processing each CIS subevent, advance to the next CIS in the round or wrap to the next subevent round - Handle no-Rx path with same round-robin logic - Update isr_tx and isr_prepare_subevent_common timing formulas to use per-CIS subevent index for interleaved packing - Suppress se_curr++ in isr_tx and isr_prepare_subevent_common for interleaved (managed by round-robin logic) - Defer payload_count finalization in next_cis_prepare for interleaved - Add bulk finalization of all CISes in isr_done for interleaved Assisted-by: GitHub CoPilot: Claude Opus 4.6 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Enable both CIS packing modes in samples. Assisted-by: GitHub CoPilot: Claude Opus 4.6 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add ISO_PACKING_INTERLEAVED Kconfig option to allow building the sample with either sequential or interleaved CIS packing. Update src/main.c to use the Kconfig to select the packing mode instead of hardcoding BT_ISO_PACKING_SEQUENTIAL. Add overlay-sequential.conf and overlay-interleaved.conf conf files. The interleaved overlay also enables BT_CTLR_CONN_ISO_INTERLEAVED in the controller. Rename the bt_ll_sw_split test to sequential.bt_ll_sw_split and add a new interleaved.bt_ll_sw_split variant that uses the interleaved overlay. Assisted-by: GitHub CoPilot: Claude Opus 4.6 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
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The Nordic LLL implementation for Connected Isochronous Streams advanced the Rx payload counters (nesn and payload_count) for payloads that were not received, but did not generate any HCI ISO data towards the Host for them. As a result, when a whole SDU's worth of payloads was missing, the ISO-AL never advanced and never emitted a lost SDU, so the Host received no indication of the gap. Add generation of HCI ISO data with status set to ISOAL_PDU_STATUS_LOST_DATA whenever an Rx payload is skipped: - when CIS subevents are not scheduled/received and the payload's flush timeout elapses (payload_count_flush and payload_count_(rx_)flush_or_(inc/txrx_inc) on close), and - when a whole CIG event is skipped due to overlapping other events (laziness) in payload_count_lazy(_update). The new node carries the lost payload number and an approximate reference anchor timestamp, mirroring the existing valid Rx data and the BIS (sync ISO) lost data generation. The ISO-AL turns the lost PDU into a lost SDU (HCI Packet_Status_Flag 0b10), which the Host can use to drive Packet Loss Concealment (PLC) in the LC3 codec. Generation is gated on a configured Rx data path. Assisted-by: GitHub Copilot: Claude Opus 4.8 Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
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The Nordic LLL advanced CIS Rx payload counters (
nesn,payload_count) for unreceived payloads but emitted no ISO data for them. When a whole SDU's worth of payloads went missing, the ISO‑AL never advanced and never produced a lost SDU, leaving the Host with no gap indication and no way to drive LC3 Packet Loss Concealment (PLC).This adds generation of HCI ISO data marked
ISOAL_PDU_STATUS_LOST_DATAwhenever a CIS Rx payload is skipped, for both central and peripheral roles.Changes
iso_rx_data_lost()helper (inlll_central_iso.candlll_peripheral_iso.c): allocates an Rx node, sets the lost payload number, an approximate reference‑anchor timestamp, andstatus = ISOAL_PDU_STATUS_LOST_DATA, then enqueues it to the ISO‑AL. Gated on a configured Rx data path; uses a peek‑2/alloc‑1 guard so a buffer always remains for radio DMA. Mirrors the BIS (sync‑ISO) lost‑data path.payload_count_flush()— subevents not received within an event (flush timeout elapsed).payload_count_flush_or_inc_on_close()/payload_count_rx_flush_or_txrx_inc()— payloads flushed when closing the isochronous event.payload_count_lazy_update()/payload_count_lazy()— whole CIG events skipped due to overlapping events (laziness).The ISO‑AL turns each lost PDU into a lost SDU (HCI
Packet_Status_Flag0b10), which the Host uses for LC3 PLC.Notes
rx.payload_count + rx.bn_curr - 1U,bn_currpre‑increment, 1‑based).Original prompt
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