Add a post-route Fmax and utilization table

[drewbabel]

This branch adds post-route timing and utilization for the synchronous and asynchronous FIFOs through the open nextpnr-xilinx flow. A reusable fmax.sh script places and routes each FIFO in a registered-boundary harness and reports the maximum clock frequency alongside LUT, flip-flop, block RAM, and distributed RAM counts. The sync_fifo reaches 324 MHz. The async_fifo carries one frequency per clock domain, 296 MHz on the write clock and 343 MHz on the read clock, since a single figure has no meaning across the two independent clocks. The README carries the numbers with an honest note that the open flow is experimental and not vendor signed timing analysis.