AArch64: lower Go write barrier intrinsics

[zhouguangyuan0718]

Summary

• define the Go write-barrier intrinsic contract
• model the private ABI result directly in fixed register X25
• lower it to an AArch64 call-like pseudo with the required private register clobbers
• expand the pseudo without exposing a normal call to generic optimization or register allocation
• avoid a result-register copy when the consumer can use X25 directly

Rebase and split

Rebased onto llvm23.1.master after #18 merged. The prior broad branch was split so this PR now contains only the AArch64 write-barrier intrinsic and lowering.

Moved to independent PRs:

• asynchronous unsafe-point and GoObj PCDATA: GoObj: mark asynchronous-unsafe functions #19
• generic SROA load-annotation preservation: SROA: preserve load annotations #20

Go PR goallc/go#32 consumes this PR together with #19. The merged alloca memory-root model from #18 is unchanged.

Validation

• fresh llc and opt rebuild against the merged GoObj: describe fixed alloca roots in statepoint deopts #18 baseline
• focused LLVM lit go-gc-write-barrier.ll: 1/1, covering default and O0 register allocation
• post-RA MIR: GO_GC_WRITE_BARRIER directly defines X25
• direct buffer use: bl runtime.gcWriteBarrier1 is immediately followed by str x0, [x25], with no result copy
• ABI return use retains the required mov x0, x25
• opt default, rewrite-statepoints-for-gc, llc -verify-machineinstrs, and GoObj generation
• diff-only clang-format and git diff --check

[github-actions]

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