Winter Break Comparch Speedrun

Components Checklist

CPU

Extensive unit test coverage for instructions in https://github.com/daniel-sudz/comparch/tree/main/src/asm including two large integrated test files.

R-types	I-types	Memory-types	Branches	Jumps	U-types
add ✅	addi ✅	lw ✅	beq ✅	jal ✅	lui ✅
sub ✅	xori ✅	sw ✅	bne ✅	jalr ✅	auipc ✅
xor ✅	ori ✅	lb ✅	blt ✅
or ✅	andi ✅	lh ✅	bge ✅
and ✅	slli ✅	lbu ✅	bltu ✅
sll ✅	srli ✅	lhu ✅	bgeu ✅
srl ✅	srai ✅	sb ✅
sra ✅	sltiu ✅	sh ✅
slt ✅
sltu ✅

ALU

• 32bit (structural with SLTU/overflow)

Shifters

• sll (32bit structural with mux-32)
• srl (32bit structural with mux-32)
• sra (32bit structural with mux-32)

Muxes

• mux2 (gate level)
• mux4 (binary design)
• mux8 (binary design)
• mux16 (binary design)
• mux32 (binary design)

Decoders

• decoder_1_to_2 (gate level)
• decoder_2_to_4 (binary design)
• decoder_3_to_8 (binary design)
• decoder_4_to_16 (binary design)
• decoder_5_to_32 (binary design)

Comparators

• comparator_eq (gate level w/ codegen)
• comparator_lt (gate level w/ codegen)

Harris and Harris

• Chapter 6
• Chapter 7

Class Lectures

• 0x11: Memory, Microarchitecture
• 0x12: Reflection, RISC-V
• 0x13: N/A Lecture Recording Missing from Archive
• 0x14: RV32i Core review, Memory Managment
• 0x15: Branches, Jumps, Loops, Functions
• 0x16: Advance Topics in CPU Design