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✨ Add write-only semantics#141

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elbeno merged 1 commit into
intel:mainfrom
elbeno:write-only
Feb 9, 2026
Merged

✨ Add write-only semantics#141
elbeno merged 1 commit into
intel:mainfrom
elbeno:write-only

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@elbeno

@elbeno elbeno commented Feb 8, 2026

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Problem:

  • Some hardware registers are write-only. This typically occurs when the hardware doesn't store the values but uses writes for edge-trigger effects.

Solution:

  • Add write_only semantic that can be applied to write functions.

Notes:

  • These write-only semantics do not take account of byte enables (which might alter written bits for a given bus). But at some level we have to assume hardware isn't doing intentionally weird things.
  • Reading is not necessarily an error (as in, it will not produce a hardware fault).
  • Field write functions take precedence over the containing register write function. So there are two straightforward possibilities where errors occur:
    • read from a register with write-only fields: a plain semantic error.
    • write to a write-only field where other fields in the same register are also marked write-only, but are not written: this would mean a RMW to preserve those fields, which is an error.
  • And there are two less straightforward error possibilities:
    • read a (readable) field in a register marked as write-only where not all bits are defined in fields (therefore reading other bits is an error). This would be strange, but it is possible to mark a register write-only and yet fill it with readable fields.
    • write to field(s) where the register is marked as write-only and not all bits are covered by identity values: this would also mean a RMW to preserve the unwritten bits.

Problem:
- Some hardware registers are write-only. This typically occurs when the
  hardware doesn't store the values but uses writes for edge-trigger effects.

Solution:
- Add `write_only` semantic that can be applied to write functions.

Notes:
- These write-only semantics do not take account of byte enables (which might
  alter written bits for a given bus). But at some level we have to assume
  hardware isn't doing intentionally weird things.
- Reading is not necessarily an error (as in, it will not produce a hardware
  fault).
- Field write functions take precedence over the containing register write
  function. So there are two straightforward possibilities where errors occur:
  - read from a register with write-only fields: a plain semantic error.
  - write to a write-only field where other fields in the same register are also
    marked write-only, but are not written: this would mean a RMW to preserve
    those fields, which is an error.
- And there are two less straightforward error possibilities:
  - read a (readable) field in a register marked as write-only where not all
    bits are defined in fields (therefore reading other bits is an error). This
    would be strange, but it is possible to mark a register write-only and yet
    fill it with readable fields.
  - write to field(s) where the register is marked as write-only and not all
    bits are covered by identity values: this would also mean a RMW to preserve
    the unwritten bits.

@mjcaisse-intel mjcaisse-intel left a comment

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nice!

@elbeno
elbeno merged commit e02c41f into intel:main Feb 9, 2026
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2 participants