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1. Qu Qu Public

   The Qu Processor: Superscalar, out-of-order, speculative, 32 bit, RISC-V. Inspired by Apple M1 Firestorm.

   SystemVerilog 4 1

2. TPU.sv TPU.sv Public

   Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1

   SystemVerilog 20 1

3. V-FRONT V-FRONT Public

   Where it all begins: Five-stage 32-bit RISC-V CPU in Verilog (Educational, RV32I 2.1 compliant, Zicsr, Zifencei)

   C 2 1

4. clairvoyant clairvoyant Public

   See beyond reality: Image super-resolution carved into silicon (FPGA Ignite 2024)

   VHDL 1

5. advent-of-fpga-2025 advent-of-fpga-2025 Public

   Forked from fyquah/hardcaml_arty

   Decorating the North Pole in Hardcaml: My submission for the Advent of FPGA 2025 challenge from Jane Street

   OCaml

6. OpenHardware-Initiative/UPMEM-MLP OpenHardware-Initiative/UPMEM-MLP Public

   Multilayer perceptron in pure C enhanced with UPMEM PIM-based training

   C 1