[xtofalex]

Prepare naja-scope 0.1.20 with najaeda >=0.7.30 and expose storage facts through the existing module-card and statistics tools. A multibit Liberty bank now contributes its modeled state-bit count; inferred RAMs and ROMs report capacity separately from registers.

• Add direct-child register-bit counts and bounded memory details (width, depth, read/write ports, initialization status, and a capped preview) to module cards.
• Aggregate register bits, RAM/ROM instance counts, and memory capacity across hierarchy. Report sequential cells without a state model explicitly, and honor parameter-dependent register models.
• Update package/MCP versions, CI dependency floor, tool descriptions, and documentation.
• Recheck CVA6 using isolated checkouts and pinned submodules. Retain v5.3.0 (2ef1c1b1fca419354920c5487293bc605294904e): master 81245a47fad8fe1a5d562d953ef2662e099def76 still fails with the MMU InvalidExpression and two hpdcache RHS calls. Record the latest issue status in CLAUDE.md.

Validation:

• Complete suite: 126 passed, including all three CVA6 regressions against a rebuilt/reloaded 0.7.30 snapshot.
• New coverage includes SV RAM/ROM, VHDL ROM, multibit Liberty registers, parameter-dependent states, unknown bit counts, bounded previews, repeated hierarchy, and snapshot persistence.
• CVA6 v5.3.0 default cv64a6_imafdc_sv39 demo, walkthrough, and gate-level examples pass.
• CORE-V-MCU demo revalidated with 0.7.30 after CI caught its stale leaf-count baseline: 630,239 leaves (631,603 with 0.7.29), 6,501 sequential cells, 320 model variants, the same 12 blackboxes, and 1,705 CDC clock endpoints. A same-source comparison confirms GPIO/arbiter/FIFO lowering changes and a table-select becoming a ROM. Only the exact leaf-count expectation changes; all other assertions remain intact.
• CVA6 cv32 aggregate query reports 16,520 register bits, zero unknown register-bit counts, and 19 RAMs totaling 317,910 bits (6.65 seconds after snapshot load).
• Wheel and sdist build successfully and pass Twine validation; the dependency-upgrade wheel also passed a clean-environment install/dependency check.

Only native naja memory primitives receive capacity summaries; opaque memory macros are not assigned inferred sizes. Register-bit totals include modeled flip-flop/latch states and exclude memory capacity.