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avx512vlcd-builtins.c/avx512cd-builtins.c tests sometimes crashing in stage 2 on Arm 32-bit Linux Benchmark libc++ #63778: Issue comment #172994 (comment) created by tbaederr
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avx512vlcd-builtins.c/avx512cd-builtins.c tests sometimes crashing in stage 2 on Arm 32-bit Linux Issue Release Workflow #567792: Issue comment #172994 (comment) created by tbaederr
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Comment on an issue Comment on an issue #343364: completed by asb
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Comment on an issue Comment on an issue #343363: completed by asb
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[RISCV] Introduce new AND combine to expose additional load narrowing opportunities CI Checks #175786: Pull request #170483 synchronize by asb
In progress asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
In progress
[RISCV] Introduce new AND combine to expose additional load narrowing opportunities Check code formatting #264875: Pull request #170483 synchronize by asb
1m 26s asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
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[RISCV] Introduce new AND combine to expose additional load narrowing opportunities Labelling new pull requests #312005: Pull request #170483 synchronize by asb
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Comment on an issue Comment on an issue #343362: completed by asb
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Comment on an issue Comment on an issue #343361: completed by aokblast
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[RISCV] Introduce new AND combine to expose additional load narrowing opportunities CI Checks #175785: Pull request #170483 synchronize by asb
2m 13s asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
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[RISCV] Introduce new AND combine to expose additional load narrowing opportunities Check code formatting #264874: Pull request #170483 synchronize by asb
1m 23s asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
asb:2025q4-riscv-and-shl-dagcombine-for-load-narrowing
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[RISCV] Introduce new AND combine to expose additional load narrowing opportunities Labelling new pull requests #312004: Pull request #170483 synchronize by asb
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Comment on an issue Comment on an issue #343360: completed by tahonermann
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[clang] Add FixItHint for designated init order Benchmark libc++ #63777: Issue comment #173136 (comment) created by ojhunt
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[clang] Add FixItHint for designated init order Issue Release Workflow #567791: Issue comment #173136 (comment) created by ojhunt
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Comment on an issue Comment on an issue #343359: completed by ken-matsui
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Comment on an issue Comment on an issue #343358: completed by Priyanshu3820
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Comment on an issue Comment on an issue #343357: completed by ken-matsui
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[CIR][X86]Implement handling for convert-half builtins CI Checks #175784: Pull request #173143 synchronize by Priyanshu3820
In progress Priyanshu3820:x86-cvt-half-restart
Priyanshu3820:x86-cvt-half-restart
In progress
[CIR][X86]Implement handling for convert-half builtins Check code formatting #264873: Pull request #173143 synchronize by Priyanshu3820
1m 19s Priyanshu3820:x86-cvt-half-restart
Priyanshu3820:x86-cvt-half-restart
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[CIR][X86]Implement handling for convert-half builtins Labelling new pull requests #312003: Pull request #173143 synchronize by Priyanshu3820
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[ValueTracking] Infer operand bound from mul nuw square predicates CI Checks #175783: Pull request #173127 synchronize by ken-matsui
In progress ken-matsui:assume-mul-nuw-square
ken-matsui:assume-mul-nuw-square
In progress
[ValueTracking] Infer operand bound from mul nuw square predicates Check code formatting #264872: Pull request #173127 synchronize by ken-matsui
1m 23s ken-matsui:assume-mul-nuw-square
ken-matsui:assume-mul-nuw-square
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[ValueTracking] Infer operand bound from mul nuw square predicates Labelling new pull requests #312002: Pull request #173127 synchronize by ken-matsui
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Release Asset Audit Release Asset Audit #12918: Scheduled
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main
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