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pages build and deployment pages-build-deployment #10: by loreii
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pages build and deployment pages-build-deployment #9: by loreii
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feat(openlane): layer_norm_edge synthesized to GDS - first Edge block… CI #8: Commit 005c8ca pushed by loreii
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pages build and deployment pages-build-deployment #8: by loreii
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pages build and deployment pages-build-deployment #7: by loreii
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fix(fpga): Fix iCE40 synthesis - add cells_sim.v library import CI #7: Commit 662265f pushed by loreii
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pages build and deployment pages-build-deployment #6: by loreii
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feat: OpenLane synthesis setup and initial Level 1 results CI #6: Commit a0f5967 pushed by loreii
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pages build and deployment pages-build-deployment #5: by loreii
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feat(fpga): Add SiLens-Edge FPGA synthesis infrastructure CI #5: Commit 349913c pushed by loreii
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pages build and deployment pages-build-deployment #4: by loreii
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feat: Complete SiLens Edge variant (50mm² classifier) CI #4: Commit 6b561d0 pushed by loreii
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pages build and deployment pages-build-deployment #3: by loreii
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Restructure for multi-variant support (silens-vlm + silens-edge) CI #3: Commit 5e71e2a pushed by loreii
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pages build and deployment pages-build-deployment #2: by loreii
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pages build and deployment pages-build-deployment #1: by loreii
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Fix: Replace absolute paths with relative paths in test results CI #2: Commit 8402652 pushed by loreii
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Complete hierarchical synthesis hierarchy (Levels 1-4) CI #1: Commit 202150b pushed by loreii
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