Fix CoreS3 LCD not working on ESP-IDF v6 (SPI bus pins left in open-drain)

[ainyan03]

Fixes #192

Root cause

On ESP-IDF v6, the CoreS3 / CoreS3SE display stops working (blank screen; with a cold NVS the board autodetection itself fails with board=0). Three conditions combine:

1. The board autodetection probes GPIO35/36/37 as input_pullup to decide whether the SPI bus lines are externally pulled up. The internal pinMode() implements inputs as open-drain outputs driven high, which sets the pad's pad_driver (open-drain) flag.
2. Up to ESP-IDF v5, spi_bus_initialize() configured the bus pins via gpio_set_direction(..., GPIO_MODE_INPUT_OUTPUT), which cleared the open-drain flag as a side effect.
3. ESP-IDF v6 routes the pins with gpio_matrix_output() only and no longer touches pad_driver (components/esp_driver_spi/src/gpspi/spi_common.c).

As a result SCLK/MOSI remain open-drain. Through the weak pull-up the lines can no longer rise at MHz clock rates, so the panel never receives a valid command and _read_panel_id() reads back all-ones. Register-level comparison between v5.5.4 and v6.0.1 shows the GPSPI2 block, GPIO matrix, and IO_MUX byte-identical — the only differing state is GPIO_PINn.pad_driver of GPIO36/37.

Fix

• 1st commit: explicitly restore the SPI bus pins to push-pull after spi_bus_initialize(). Harmless on all IDF versions (v5 and earlier already end up in this state).
• 2nd commit: replace the chip-specific register-field #ifdef branches in pinMode() (pad_driver / func_out_sel) with gpio_ll_od_enable/od_disable and esp_rom_gpio_connect_out_signal, whose per-chip implementations absorb the register naming differences, so future chips need no new branches.

Verification

• M5Stack CoreS3SE + ESP-IDF v6.0.1: autodetect, drawing, and readRect round-trip verification all pass (previously blank / autodetect failure)
• No regression on device: CoreS3SE + v5.5.4, M5StickS3 + v6.0.1
• Builds: esp32s3 (ESP-IDF v5.5.4 / v6.0.1), esp32, esp32c61 (v5.5.4), Arduino-ESP32 2.x (ESP-IDF v4.4)
• CI on the fork: all workflows green

[Copilot]

Pull request overview

Fixes CoreS3/CoreS3SE LCD failures on ESP-IDF v6 by ensuring SPI bus pins don’t remain in open-drain mode after prior pinMode(input_*) usage, and by reducing chip-specific register-field handling in pinMode() via ESP-IDF LL/ROM helpers.

Changes:

• Use gpio_ll_od_enable/disable (when available) to manage open-drain configuration in pinMode() without chip-specific register-field branching.
• Use esp_rom_gpio_connect_out_signal() (when available) to restore GPIO output signal routing in a chip-agnostic way.
• After spi_bus_initialize(), explicitly force SPI SCLK/MOSI/MISO pads back to push-pull (disable open-drain) to avoid slow-rising edges on ESP-IDF v6.

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