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Technical engine subtask of ARSAS planning PR #502, designed above the verified consumer #501 and engine draft #157 (HEAD 8b0c0f7e695b016834e40a6f068994dcc945cb1a). Issue only; no engine code/pin change yet. Do not merge to main or override existing trial locks.
Observed, redacted C264 evidence
A local C264 MMS simulator on the same Windows host as the ARSAS consumer successfully associates and sends InformationReport frames. SCL model: 30 DataSets, 364 static FCDA member entries; consumer requests 207 static report-only runtime points on 29 planned RCB targets; at one snapshot 134/207 values displayed, 73 pending, 4/29 RCBs had proven ingress. Multiple incoming whole-FCD Structure(4) values are rejected when projected toward a scalar Mod.stVal. A Boolean status likewise reports Structure(5) and REPORT_RAW_STRUCT occurs for LLN0.Mod/LPHD.PhyHealth. The rejection safeguard is correct; the input-aware scalar projection needs exact evidence.
C264 SCL uses both rmsMMXU1 and powMMXU1 prefixes; do not resolve FCDA by lnClass=MMXU,lnInst=1 alone. Distinguish missing RCB/GI emission from a received but unprojectable whole-FCD payload. A model declaration is not proof of runtime ingress.
Target change contract
Investigate src/AR.Iec61850/Mms/MmsSemanticReportValueProjector.cs and MmsReportValueProjector.cs; inspect typed MMS Structure/Array children and exact ordered canonical FCDA identity (LD, prefix, lnClass/lnInst, doName, daName, FC and verified static DataSet order).
Normalize only schema-matched scalar process descendants stVal, mag.f, companion q and timestamp t with strict kind, length and parent identity. Emit source member position, type and proof / explicit failure reason; if ambiguous, fail closed, never invent a scalar, enum state, q=Good, or time.
Respect optional/extra children and whole-FCD schema encoding differences only when safely provable. No broad substring, regex or positional guess using unrelated IED models.
Preserve raw InformationReport evidence and RCB continuity state. No cyclic MMS process polling fallback and no dynamic DataSet writes on ARSAS Static DataSet path.
Add synthetic tests: 4-child Mod FCD → Mod.stVal + quality/timestamp where typed children prove exact mapping; 5-child Boolean if schema safe; two prefixed MMXU nodes; wrong FCDA order / missing member / mismatched type rejection; repeat-run and memory bounds.
Acceptance / handoff
Produce a minimal draft engine PR stacked on #157 with exact test fixtures (sanitized, no user raw proprietary SCL), then consumer integration with explicit lock update only after CI. Must show which of 73 pending values were blocked by ingress vs typed projection and validate with real C264 simulator. Prevent regressions to successful IEC 61850 controlled switch command flows and earlier BCU GE whole-FCD MX handling. See ARSAS plan and handoff docs in PR #502.
Activity