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P0: real SV phasor angles, nominal 4I+4V presentation and honest sync diagnostics - #37

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masarray merged 9 commits into
mainfrom
fix/p0-phasor-true-sample-angles-20261017
Oct 17, 2026
Merged

masarray merged 9 commits into
mainfrom
fix/p0-phasor-true-sample-angles-20261017

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Concrete P0 fixes

  • Compute every measured voltage/current phasor from the corresponding channel's SV coherent sample slots. Missing channel values no longer shift phase indexing. No fabricated or held default angles when coherent evidence is absent.
  • Add end-to-end publisher-frame regression: Ua=0, Ub=-120, Uc=+120, Ia=-30, Ib=-150, Ic=+90, then dynamically change Ic to +45 while Uc remains +120. Ensure zero current has no invented arrow.
  • Fix phasor diagram imposing 280 DIP into a smaller parent, which clipped labels/arrows; clamp label text to render bounds.
  • Auto-suggest nominal 4I+4V (1mA/10mV per count) only after receive decoder recognizes exact raw 4I4V instMag/q profile, explicitly assumed, never physical calibration. Raw override persists per stream.
  • Clearly separate decoded quality from smpSynch=0 NOT SYNCED and mark it as a Diagnostics warning. PTP observed is NOT proof of sample clock lock.
  • Label rolling mean/max arrival jitter window (last 4000 intervals); the 5s excursion counter remains separate.
  • Regression coverage for quality/synchronization and nominal eligibility.

No forced Ic=90 angle: real publisher phases must be measured, not hardcoded. No publisher changes, no active network operations.

Gates

  • Windows Release build and xUnit
  • Runtime stability
  • CodeQL
  • Dependency audit
  • Candidate package verified
  • Physical A/B check against ARStack Injector and relay (external bench; not implied by CI).

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📝 Code Review ⚠️ Failed 2026-10-17T12:48:17.660776Z c06204d PR opened
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@masarray
masarray merged commit 495ff94 into main Oct 17, 2026
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@masarray
masarray deleted the fix/p0-phasor-true-sample-angles-20261017 branch October 17, 2026 12:53
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