Skip to content

FAT P0 integration checkpoint: invalid quality vector in Browser and Device Explorer - #679

Draft
masarray wants to merge 477 commits into
feat/smv-sharp-latest-p0-20261022from
fix/fat-integrated-quality-attention-20261022
Draft

masarray wants to merge 477 commits into
feat/smv-sharp-latest-p0-20261022from
fix/fat-integrated-quality-attention-20261022

Conversation

@masarray

@masarray masarray commented Oct 22, 2026 •

Copy link
Copy Markdown
Owner

FAT 2026-10-22 integration — WORK IN PROGRESS (no approved physical FAT)

Current source HEAD: c05c26848e78c24ddea9987e7c50de97c7af3204 (draft, exact SHA must be reverified after every push).
Base: modern SMV #671 HEAD 9457832a8ad1c89f93692870d9ad091402e51494 (already contains merged #678).

Committed in this draft

Provenance and qualification

Remaining FAT verification

Actual SIEBCU 18/18 selected members (6 pending reasons), original 74/57 exact FC model reads, GI/RCB inclusion+q/t, physical ARStack PCAP/80/256 UNVERIFIED, Command Dock pixel geometry at DPI, Windows portable runtime/hash/smoke, measured CPU/GC and user-approved safety bench. No claims of reference engineering tool-grade parity or relay-trusted PTP/SV without proof.

Edition 2 prefixed-LN trial (2026-10-22)

  • Physical field diagnostic: SG7_BCU accepts MMS and reporting, but all 13 selected controls fail semantic admission because typed Boolean Oper.ctlVal was inferred SPC despite declared DPC Pos.stVal Dbpos on prefixed LN names (e.g., Bkr0XCBR2, Disc0XSWI1, BkrCSWI1).
  • Engine trial is isolated in ARIEC61850 PR Fix Event Log value when legacy report sends CDC struct #189: earlier tested revision 5744f302fb3ee949bb57eb84800c9ff68fbbd040 passed .NET CI; current revision 24aae4698026f3a5cf7a35225c5d8000018af3e4 adds bounded typed NameList recovery for renamed Boolean DPC and BSC TapChg, including the fix for duplicate same-object ST reads; exact-SHA engine CI remains pending. No physical Operate performed or claimed.
  • Current ARSAS trial feature uses qualified engine fix: bind Signal Selection one-to-one to static DataSet members #184 unchanged. FAST DEV has explicit experimental SHA option to compile/test against Fix Event Log value when legacy report sends CDC struct #189 without changing production R7/R10 provenance. FAST DEV remains nonrelease, no automatic IEC control operations.
  • Fix in FAT P0 integration checkpoint: invalid quality vector in Browser and Device Explorer #679 includes one consolidated reusable regression invocation (not two), unchanged workflow count/budget, and no additional Windows runner. Engineering trial procedure in docs/GE_ED2_PREFIXED_LN_DPC_FAT_TRIAL.md.
  • Do not promote the engine or distribute trial binaries until exact-SHA compile/tests, stage-observed SBOw/Operate/Termination, quality/interlock safeguards, and operator-approved isolated relay FAT pass.

Incremental Command Dock stability and completeness, 2026-10-22

  • 7b9f983: publish newly verified controls in bounded 16-inspection intervals, not only after whole IED scan. Identity-preserving reconciliation; no Reset on unchanged rows.
  • 7ea7657: synthetic exact-reference positive/negative tests for prefixed DPC, BSC TapChg, arbitrary SPC control and StatusOnly/advisory exclusion; update trial doc to live double-point proof rather than LN-name authority.
  • 19580fd: make verified CDC, DataSet advisory and teardown signals idempotent; 100 repeated report/inspection notifications do not toggle live command authority.
  • 1823395: regression test actual OperableCommandSignals under 100 report updates, real revocation and restoration, correct BSC TapChg typing and preserved operator checkbox.
  • CI-P1 FAST DEV can use engine_trial_sha to compile/test the engine trial without touching the approved engine lock. Manual opt-in test against current Fix Event Log value when legacy report sends CDC struct #189 HEAD still NOT EXECUTED; no trial EXE or physical Operate claimed.
  • Pending exact-SHA Windows canonical Build/R7/COMTRADE result. A prior R7 pass ran 2655/2655 ARSAS tests but had 1 timing-sensitive legacy fix: bind Signal Selection one-to-one to static DataSet members #184 engine test failure; no safety gate bypass/false PASS.

Cross-repository FAST DEV interoperability proof — SUCCESS (2026-10-22)

  • Actual Windows runner, nonpromotion, GitHub Actions run: https://github.com/masarray/arsas/actions/runs/39767540537
  • Tested source SHA: f5726f6f12c55e67efc1caec64fce3a90c3d9449 against exact experimental ARIEC Fix Event Log value when legacy report sends CDC struct #189 SHA 24aae4698026f3a5cf7a35225c5d8000018af3e4.
  • Windows build succeeded + 69/69 focused command-read regressions passed, 0 failed, with explicit positive test-count TRX assertion; job and classifier SUCCESS. SHA/TRX manifest artifact: ci-p1-shadow-39767540537-1.
  • Verified runner logged: NON-PROMOTABLE ENGINE TRIAL ... and Validated CI-only engine ... against unchanged approved lock. Source engines/ARIEC61850.lock.json remains production fix: bind Signal Selection one-to-one to static DataSet members #184 9c7cb40364023a7b217e5ec31ab3105ba90142eb; ephemeral override stored ONLY in the runner temp folder. Existing production MSBuild fail-closed lock validator was NOT weakened.
  • ci-p1-shadow label was removed after proof to avoid needless additional Windows builds on later PR pushes. Future trial opt-in: add label again to reuse exact pinned engines/ARIEC61850.trial.json.
  • Scope limitation: Synthetic regressions and real cross-SHA compilation DO NOT equal physical SG7_BCU SBOw/Operate/feedback acceptance. Production lock promotion and EXE delivery with Fix Event Log value when legacy report sends CDC struct #189 remain blocked until operator-authorized relay FAT + full provenance release checks.

SG7_BCU Edition 2 — executable physical FAT trial delivered

  • Actual downloadable GitHub Actions artifact: https://github.com/masarray/arsas/actions/runs/39771165218/artifacts/12422956282. Run success, artifact ID 12422956282, ARSAS-SG7-BCU-ED2-FAT-TRIAL-39771165218, ~73.7 MB, nonexpired at verification.
  • Inside ZIP: ARSAS-SG7_BCU-ED2-FAT-TRIAL-24aae469-win-x64.exe, FAT-TRIAL-SHA256.json, portable-build-identity.json, native-ardirec-ctest.xml, READ-ME-FIRST.txt, 69/69 Windows focused regression TRX and no-promotion CI manifest.
  • EXE SHA-256 0b2050e5dd1abeacee31d82f92ebf2150e091f5fc1f03a497e2a1d00bf22c035. Single-file .NET Windows x64 self-contained publish, tested native ArdIrec bridge embedded, real --portable-smoke-test exit 0.
  • Tested app SHA 0b1d1e919305886ae182d2ba573a4247f3e416a3, trial engine Fix Event Log value when legacy report sends CDC struct #189 SHA 24aae4698026f3a5cf7a35225c5d8000018af3e4, unchanged approved production lock fix: bind Signal Selection one-to-one to static DataSet members #184 SHA 9c7cb40364023a7b217e5ec31ab3105ba90142eb. Engine Fix Event Log value when legacy report sends CDC struct #189 independent .NET CI green.
  • Existing workflow ci-p1-shadow opt-in, no additional workflow or artifact-upload budget. Trial MSBuild source validation uses SHA-verified temporary lock OUTSIDE repo; actual production lock validation NOT bypassed for normal build/publish.
  • Ready for supervised physical relay FAT meaning deployable tested candidate, NOT proven physical SBOw/Operate/CommandTermination. Require isolated test bench, authorized operator, live IEC evidence, first read-only Connect/Discovery/RCB validation, positive/negative control stages, q/t and interlocks. No release/promotion, no automatic uncertain command retry, PR remains DRAFT.

2026-10-22 SG7_BCU actual-device feedback → vendor-neutral Command Dock fix

  • User-visible field capture from SG7_BCU proves 319 live control objects, 13 DataSet-selected XCBR/XSWI Pos targets plus 4 verified independently discovered CSWI.Pos, with CILO ST interlocking statuses separate. The old Command Dock incorrectly presented a valid generic GGIO2.DPCSO01 ahead of the verified SG7_BCUSystem/Bkr0XCBR1.Pos because all controls had identical presentation priority 45 and alphabetical LN sorting. Successful generic channel Operate is NOT evidence of breaker switching.
  • Fix: keep all real operable CO DOs in the catalog, order and label exact live-verified XCBR.Pos as breaker, XSWI.Pos as disconnector, CSWI.Pos as switch controller, ATCC.TapChg as tap changer before unmapped vendor position commands and generic GGIO/auxiliary; role NEVER admits a command. Status-only CILO and non-control CILO do not enter the operable Dock. No inferred XCBR-CSWI-CILO physical wiring, no vendor-specific branch, no change to command MMS semantics or interlock/sync user settings.
  • c05c26848e78c24ddea9987e7c50de97c7af3204 also prioritizes read-only ctlModel inspection of switching/tap DOs ahead of large generic CO banks. Added test with 900 generic channels and 100 report updates proves stable ordering and no authority promotion.
  • Download Windows self-contained single-file executable, newly built after fixes: https://github.com/masarray/arsas/actions/runs/39781253700/artifacts/12426154964
  • Run 39781253700 Windows CI P1: 71/71 targeted regression tests PASS, 0 failed; exact experimental ARIEC 24aae4698026f3a5cf7a35225c5d8000018af3e4, native ArdIrec built with CTest, portable executable published and actual --portable-smoke-test PASS, SHA-coupled manifest and TRX artifact stored.
  • EXE file: ARSAS-SG7_BCU-ED2-FAT-TRIAL-24aae469-win-x64.exe; SHA-256 3126ec80139ae1d7d4044fd1e8c1a0e9328e3691c227104588ca6e558bb90fa9. Distinct artifact from previous source build; do not confuse them by the same engine-based filename. Artifact ID 12426154964.
  • Production engine source lock stays fix: bind Signal Selection one-to-one to static DataSet members #184, original FAT/provenance is untouched; new binary FAT supervised trial only. No operator-authorized physical SBO/Operate acceptance or actual breaker travel has been demonstrated by this CI.

Final verified CI on source c05c268

All 7 active checks completed SUCCESS: Build ARSAS, SCL Interoperability R7, SV Evidence, COMTRADE, IEC 61850 Interoperability Reference Guard, CI P0 Workflow Integrity, CI P1 opt-in engine #189 Windows trial. Canonical Build ARSAS: 2665/2665 application regression PASS, 24/24 pinned engine selected tests PASS and 6/6 exact packaged native integration tests PASS. R7: 2661/2661 ARSAS PASS, independent baseline engine 1182/1182 PASS. FAST DEV actual trial engine #189: 71/71 PASS, single EXE native-backed publish and smoke PASS. Artifact: https://github.com/masarray/arsas/actions/runs/39781253700/artifacts/12426154964 ; EXE SHA256 3126ec80139ae1d7d4044fd1e8c1a0e9328e3691c227104588ca6e558bb90fa9. No workflow count increase. Trial label disabled to avoid extra costly Windows run. Approved production engine lock unchanged and PR remains draft; no external physical relay control claimed.

2026-10-23 field-critical: WPF CustomSort overrode command role priority

  • Latest user physical-app screenshot (04:28 Jakarta) still displayed SG7_BCUMaster/GGIO2.DPCSO01 first despite diagnostic showing 13 selected verified operable XCBR/XSWI and four independent verified CSWI. Root cause confirmed in source: MainWindow.IecNaturalSort.cs applies IecNaturalCommandSort.Instance as ListCollectionView.CustomSort over bound SelectedDevice.OperableCommandSignals, making the view sort by natural telegram name instead of the source's role ranking. It forced SG7_BCUMaster/GGIO2 above SG7_BCUSystem/Bkr0XCBR regardless of verified equipment priority. Previous tests only checked underlying collection and therefore missed the actual WPF presentation bug.
  • Source fix 96b3128bee707b2cb1046a722e085b302c8bfc3f: real IecNaturalCommandSort.Compare now compares Iec61850ControlIdentity.CommandDockPriority first, then retains natural telegram instance order WITHIN role. No MMS control authority or actual IEC reference changed; CILO status excluded; GGIO still present below equipment controls.
  • Regression: MultiGridNaturalSortRegressionTests.ActualWpfCommandGridViewMustDisplayVerifiedSg7BreakerAheadOfGgioBank uses real WPF DataGrid + CollectionViewSource/ListCollectionView.CustomSort with 64 generic IO channels and four XCBR, three XSWI and four CSWI, asserts visual order, preserves row identity and controls across refresh. Commit 1f82e286807de9311bed2651bae8959d7a8df7f2 mirrors production CanUserAddRows=False in the test fixture; previous test-only failure was an MS.Internal.NamedObject WPF new-item placeholder, not command correctness.
  • Current field-trial EXE: https://github.com/masarray/arsas/actions/runs/39859110941/artifacts/12460653959 ; Windows x64 self-contained, latest ARSAS source 1f82e286, nonrelease exact engine 24aae4698026f3a5cf7a35225c5d8000018af3e4, 71/71 scoped command tests PASS and EXE portable smoke PASS. EXE SHA256: d3e9485c121287f7ad00d6562b98e51c0fc16e0547567cc1aee66b0a682c221c. The previous ZIP/EXE from run 39781253700 MUST NOT be used for judging Command Dock, because its WPF CustomSort remains alphabetic.
  • Report explicitly shows no open engineering IID/SCD, therefore physical CB→CSWI/CILO links cannot be claimed CID-verified without corresponding original engineering file. Live MMS proves the named XCBR.Pos are typed DPC/SBO Enhanced (read-only inspection); physical Operate must be a separately supervised FAT.

Verified release-candidate confidence at 1f82e286

  • R7 39859110742: SUCCESS, 2663/2663 ARSAS tests PASS (including actual WPF CustomSort/DataGrid fixture), 1182/1182 baseline ARIEC tests PASS. https://github.com/masarray/arsas/actions/runs/39859110742
  • Trial 39859110941: SUCCESS, 71/71 focused command-read tests PASS, native ArdIrec build/tests and portable EXE smoke PASS; FAT-only EXE artifact and checksum listed above. https://github.com/masarray/arsas/actions/runs/39859110941
  • Original field diagnosis identifies SG7_BCUSystem/Bkr0XCBR1..4.Pos as typed DPC/SBO enhanced canOperate=True; physical equipment mapping is not asserted as CID/IID verified absent that engineering file.

Final status at 1f82e286 (2026-10-23): 7/7 active workflows SUCCESS — Build ARSAS, R7, SV evidence, COMTRADE, reference guard, P0 workflow integrity, and CI P1 FAST DEV. PR remains draft/unmerged; no production lock promotion or unsupported field-Operate claim.

@masarray masarray changed the title FAT P0 integration checkpoint: invalid quality vector in Browser and Device Explorer FAT P0 integrated + FAST Draft CI: Invalid quality UI / SMV / MMS / direct EXE Oct 22, 2026
@masarray masarray changed the title FAT P0 integrated + FAST Draft CI: Invalid quality UI / SMV / MMS / direct EXE FAT P0 integration checkpoint: invalid quality vector in Browser and Device Explorer Oct 22, 2026
masarray added a commit that referenced this pull request Oct 22, 2026
Workflow-only optimization; no ARSAS functionality, SMV, control code or engine lock changed. Exact single-file upload uses archive:false for FAST trial, old diagnostics preserved for nontrial; manifest-only trial PR skips redundant Build ARSAS. CI-P0 Workflow Integrity and CI-P1 classifier passed. Merge atop latest #679 changes without force-push.

Copy link
Copy Markdown
Owner Author

2026-10-23 UI navigation / independent IEC 61850 look-and-feel checkpoint

MERGED into this FAT checkpoint via #685, merge SHA ae5cbca359debf52c4ae97c24c9c98685c4b81d8 (not to main). Operator-requested six root categories now show Reports, DataSets, Data Model, Files, GOOSE, Setting Groups, in that exact order. These retain their immutable category keys and lazily loaded LD/LN/DO/DA descendants, no source identity alteration, no MMS reads/writes or changed command/report/SMV routing. Only three files touched: Models/IedBrowserPresentation.cs, tests/ARSAS.Tests/IedBrowserPresentationTests.cs, tests/ARSAS.Tests/P0BrowserRcbEnabledTruthTests.cs.

CI evidence: https://github.com/masarray/arsas/actions/runs/39876614225 — SUCCESS; ARSAS regressions 2,663/2,663 passed, engine consumer tests 24/24 passed, Windows Build/portable smoke and pinned native bridge success, 0 errors (build contains warnings; do not claim zero warnings). Independent SV evidence run https://github.com/masarray/arsas/actions/runs/39876614226 — SUCCESS. CI P1 classifier success. Old hardcoded navigation ordering expectations were updated in both test suites. One failed intermediate CI after the first test change was corrected before merge, no failed SHA merged.

Legal/product rationale: IEC 61850 standardizes equipment/service data, not six UI navigation positions; original ordering visually matched a reference engineering application. ARSAS category presentation now independently ordered. This is differentiation, not a legal non-infringement certification and not permission to reuse third-party protected artwork/source. Full UI asset/license review remains separate.

Main/field invariants: arsas/main unchanged, engine approved lock #184 (9c7cb40364023a7b217e5ec31ab3105ba90142eb) unchanged. This merge does not automatically regenerate the separate experimental staging-engine FAT EXE. If a new physical-test EXE is needed, use FAST direct EXE trial with this updated ARSAS source and explicit staged engine SHA, without modifying production lock.

Copy link
Copy Markdown
Owner Author

Engineering checkpoint — Premium Smart IP integrated + FAST FAT EXE (2026-10-23 WIB)

FAT integration: #689 MERGED into fix/fat-integrated-quality-attention-20261022, HEAD c1057408711d3464f70d5b63fd38f976af27d5ba (first merge parent 10b3ebf73a902785dad711b8c2ebd7b8f5a910dd). Exact diff: only IpConnectWizardWindow.xaml, .xaml.cs, Services/UserPreferenceStore.cs, five focused test files. Browser order, panel geometry, engine lock, MMS/RCB/control/SMV/PTP unchanged.

Delivered: segmented four-octet IPv4 with validation, navigation, paste, inline feedback; history search/recall without connecting; exact saved IP:port and distinction between last discovery submission and successful connection (existing preference store only, no parallel storage); raw IPv6, MMS 102 default, original SCL/AP caller contracts.

Windows CI: canonical Build ARSAS (feature HEAD 0fa12d17d393758edf6b2208350ff8490bb9a53e) SUCCESS https://github.com/masarray/arsas/actions/runs/39884137730 (solution, full ARSAS tests including WPF STA, pinned engine, native ArdIrec, portable smoke), SV evidence SUCCESS https://github.com/masarray/arsas/actions/runs/39884137729, P1 classifier SUCCESS https://github.com/masarray/arsas/actions/runs/39884137733.

FAST FAT trial: reused #687 and original ci-p1-shadow workflow, branch trial HEAD 15672f454f5f1a0083feb2a9570cddeb1d9b289f with integrated FAT as first parent, experimental ARIEC staging 725662b004b74c3743943f83f3bcf93b745f7823. Production-approved lock still 9c7cb40364023a7b217e5ec31ab3105ba90142eb. Windows run https://github.com/masarray/arsas/actions/runs/39885275821 SUCCESS: focused 71/71 tests passed; native bridge and actual portable EXE smoke SUCCESS; uploaded one raw .exe with archive:false. Artifact https://github.com/masarray/arsas/actions/runs/39885275821/artifacts/12472645988, filename ARSAS-SG7_BCU-ED2-FAT-TRIAL-725662b0-win-x64.exe, EXE SHA-256 ee5f91ff03d02cfa963219233494853fdd6ee966d90a1b491acd7e5a92ae2fca (job log and artifact digest agree).

R7 investigation: old FAT R7 https://github.com/masarray/arsas/actions/runs/39877579177 failed 8 concurrent WPF/STA timeout tests (2655 other tests passed), possible contention but cause not proved. Later FAT baseline R7 https://github.com/masarray/arsas/actions/runs/39881006788 SUCCESS. No tests disabled or success fabricated. No exact-new-merge R7 rerun claimed.

Remaining: physical SG7_BCU SBO enhanced / XCBR, Command Dock/RCB and SV/PTP bench FAT issues remain independently pending. Trial is nonproduction, no physical Operate acceptance, no engine #192 promotion, PR #679 and trial #687 remain DRAFT, no main merge.

masarray added a commit that referenced this pull request Oct 23, 2026
… fixes in P0 branch

Three-source zero-regression assembly: #679 c105740, #686 300f26c, #688 P0 SG7 performance; blob-identity preflight verified all nine modern wizard/geometry paths.

Copy link
Copy Markdown
Owner Author

2026-10-23 — Compact Smart IP UI follow-up (visual feedback resolution)

Copy link
Copy Markdown
Owner Author

2026-10-23 FAT UI/first-paint stabilization checkpoint — PR #692 MERGED

User screenshot showed prior Smart IP form still looked like stacked WPF cards/oversized advanced options. Actual startup code audit showed multiple competing visual authorities: App.OnActivated rethemed every active window, P2BlueSteelGreigeUx replaced bundled Inter with Plus Jakarta Sans, and 52/60/64px navigation shell heights were being written in different late passes.

Merged FAT HEAD: fe317a15e233e57d301b00ccf08a637b87f80e13 (first parent prior FAT c3555b639de0bbed14fdd06b55683479cf25bd31, second parent exact-tested PR head 354f020141cac0493abe94e264be6b6d36d96528). Git tree equality VERIFIED: both PR head and FAT merge point to 9ce447814175a91949425c4286dd1b2c6a0701f2. Scope exactly 9 files, exclusively UI/source-level UI regressions.

Changes: rebuilt 480px IpConnectWizardWindow.xaml as a single lightweight ARSAS/Inter compact dialog; centered four compact keyboard/paste-capable octets, one visual IP field and history chevron/divider, search popup width tracks field, no outer white card or technical banner, minimal keyboard-accessible rotating Advanced settings disclosure with visible custom port. Exact saved IP:port remains; non-102 port always expands Advanced so port is visible. No auto-connect; original IEC session/authority semantics preserved.

Startup: prewarm industrial control resource dictionary before StartupUri window creation; apply P2 adapters at most once per loaded window instead of on every Activated; preserve the globally bundled Inter font, XAML defines MainWindow maximized before first render; remove duplicate nav/pill height writes from two adapters and make responsive nav layout the sole 60px height authority while retaining clipping guard. Intentionally not re-parent the critical P0/P1 FAT workbench at a new lifecycle priority without visual instrumentation/relay testing, so first-frame flicker improvement still requires observation on target Windows DPI.

Exact SHA CI SUCCESS: Build ARSAS https://github.com/masarray/arsas/actions/runs/39899361182 : WPF build, 2687/2687 app tests, 24/24 pinned engine tests, 0 skipped, native ArdIrec, publish & EXE smoke. SV https://github.com/masarray/arsas/actions/runs/39899361031 SUCCESS, P1 https://github.com/masarray/arsas/actions/runs/39899360975 SUCCESS. One intermediate run had 1 obsolete size assertion; strengthened FieldRegressionFixTests to check single final navigation height, full suite green on final SHA. New StartupVisualStabilityRegressionTests added, no tests disabled.

Direct portable approved-production-engine EXE, not ZIP: https://github.com/masarray/arsas/actions/runs/39899361182/artifacts/12478122537 . ARSAS-1.6.40-win-x64-portable.exe 79,199,571 bytes, SHA256 65bfcd802c2bc7181ab2f3b0212a932432d4c7610f81cef90d4940de25c5df21 (run log and uploaded artifact digest match). Approved engine lock remains exactly 9c7cb40364023a7b217e5ec31ab3105ba90142eb. No change to engine, RCB, SV/PTP, SCL, control, Workbench P0/P1, staging pins, workflows or main. FAT #679 remains DRAFT; no physical/visual Windows screenshot approval claimed.

Copy link
Copy Markdown
Owner Author

FIXED: Write dialog close → exact DA Read → Browser Data Model SSOT. User observed popup ctlModel changed while Data Model leaf remained stale. Dedicated PR #720 merged into FAT branch only as commit a8a88b9a1a6a982bd96419f6cc3a436df49bb447 from exact tested fb65455ed69c5cfa0ece289b6b102c1b6bfdf76a. On Write attempt, each ctlModel/single DA/DO batch/legacy config editor auto-closes and transfers exact attempted refs/FC/association. MainWindow queues one-shot, bounded exact live-model read (max 64), reusing existing Browser typed MMS Read inbox and device.LiveValues.PublishForAssociation + RefreshIedBrowserVisibleValues; no popup-local data cache or guessed UI value, no full-Ied bulk read, no automatic Write retry. Read request checks model instance, association and unique canonical leaf identity. Existing browser read in flight is respected with bounded deferred dispatch. Exact PR source CI: Build ARSAS run 40048122059 SUCCESS, engine 24/24, application 2884/2884, native bridge 6/6, R7 run 40048121985 SUCCESS, SV run 40048122071 SUCCESS, P1 success. Portable Win x64 artifact SHA-256 b617ba490e8acab6ae3781f9726c6e6f2e04eb7d651cd8dcd1b2dfb2329e9a2e. Fresh combined FAT merge SHA CI separate; pending. Keep FAT draft; physical IED acceptance not yet proven. No engine pin changes.

Copy link
Copy Markdown
Owner Author

Post-Write IED Browser SSOT proof integrated (PR #723) — FAT merge commit 04350e15f9be9d429cf1a908b81bab922c36f093 only, not main. The browser verifies exact FC/association new MMS Read revision after Write and refreshes leaf data model; stale values do not count. The verified/rejected Write result is preserved independently from success/failure of Browser Readback. Staging source SHA 96ba20175c3a6f984f043ac9f8c692c2bff09a6f PASS: Windows Build 40052189718 2885/2885 app regressions, 24/24 engine, 6 native bridge tests; R7 40052189731 SUCCESS, SV 40052189722 SUCCESS, P1 success. Test artifact ARSAS 1.6.40 portable x64 ID 12544385501, EXE SHA256 2de93d335b1116b157d84f653c1b989a29fc2d252bf402f195824478cf447aaa. FAT remains DRAFT; no production/energized IED authorization or physical ZIVAVR proof claimed. Postmerge exact SHA gates are separate.

Copy link
Copy Markdown
Owner Author

CROSS-THREAD HANDOFF — ARSAS SMV TAB ACCEPTED CHECKPOINT (2026-10-24)

Operator-approved SMV P0–P3/P1 final stack merged via #725 to isolated integration branch checkpoint/smv-tab-v1640-fat-accepted-20261024, merge commit bcf0ceb92a4dc6081d725ce0bd0c8f60bc102cc4. FAT source 4b2b62f882a81988a39a2f82d1ac8ff67592be02, 2784/2784 Windows regression + engine 24/24 + native 6/6; SV check green. Compare of accepted source to merge showed only the new handoff Markdown file changed. Original SMV PRs #708/#711/#714/#715/#717/#719/#722 and historical #667/#671/#675/#680 now closed as superseded; source branches preserved.

Read HANDOFF_ARSAS_SMV_TAB_ACCEPTED_CHECKPOINT_2026-10-24.md on checkpoint branch. Do not overwrite the locked SMV HUD/measurement/sync behavior, or treat publisher-reported smpSynch as independently verified PTP. Do not interpret this as merged to main. #705 SSOT base, SG7 performance and independent MMS Control/Write branches are unchanged. Forward promotion requires reviewed reconciliation of current branches and exact-head CI.

Copy link
Copy Markdown
Owner Author

FREEZE — user-accepted MMS Write / Browser Data Model as of 2026-10-24. User physically confirmed Write works: one click -> editor closes -> exact DA automatically re-Read via MMS -> IED Browser leaf refreshes. Immutable SHA anchor via new non-mutating checkpoint branch checkpoint/arsas-write-damodel-field-accepted-20261024 = 04350e15f9be9d429cf1a908b81bab922c36f093 (FAT PR #679). No further Write changes absent an observed regression. NEVER merge all of this older FAT tree over latest SSOT V2 or operator-accepted SMV; preserve their branch heads and tests. Integrator-only draft PR #726 ports just 10 proven Write/readback files onto latest SSOT perf/static head fb4932d127807fa83bf3b1fb70058fbdfdb3c966, leaves all SMV/SSOT performance/code and engine pin unchanged. PR #726 is NOT authorized to merge until complete exact-head CI and independent SSOT/SMV accepted baseline reconciliation. SMV canonical checkpoint/smv-tab-v1640-fat-accepted-20261024 (84b6e15..., PR #725), static+SSOT perf #724. No main merge and no forced rebase/rollback. Keep Write artifact SHA256 2de93d335b1116b157d84f653c1b989a29fc2d252bf402f195824478cf447aaa with user acceptance.

Copy link
Copy Markdown
Owner Author

Cross-thread integration notice — RC0 handoff (2026-10-24)

Authoritative draft RC consolidation PR #727, source branch release/arsas-integrated-rc0-20261024, exact head 77c6cd2dccd27de155bbad6799b3d914be118c9a. Full plan docs/handoff/HANDOFF_ARSAS_ALL_THREADS_TO_RC_2026-10-24.md.

This DOES NOT merge into main or close your PR. Reconciliation on the SSOT/performance accepted base b1d177885ff8cba6515e19f0aec33d1fc887519b proves the final FAT Write/post-Write readback delta is exactly 10 files with identical blob SHAs in #679 and #726. We staged those ten files ONLY on the isolated RC branch. All other baseline blobs, including Views/SmvInlineViewer.xaml, MainWindow.xaml, and the engine pin are unchanged. Do not re-merge a stale whole-branch #679/#726 over RC0 or overwrite advanced SMV/IED Browser/Smart IP.

RC0 remains DRAFT; exact CI, protected visual regression, three-IED field FAT, report continuity/SOE and R10 release gates are pending. Resolve conflicting future changes on the one RC lane with expected-SHA checks and preserve checkpoint history. PR closure should be provenance-based after accepted integration, not premature mass-closing.

This branch has not been deployed

No deployments
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant