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…perability contract
…perability contract
…ting rational schedule
…ely from physical claims
…ed TAI epoch conversion
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Purpose
Improve real ESP32-P4 PTP/SV interoperability without faking synchronization or breaking stable 4I+4V publisher. Standards-referenced M1 only; not yet an alarm-free IED acceptance claim.
Base:
main@9e70a4937874e3e1752b725264fe5a2008aa8fb0.Code
smpCnt=0starts near its next PTP second (coarse initial alignment).smpSynchfails closed on bare PTP clock lock: SV timeline phase qualification is still required; laboratory forced statuses remain distinct.docs/PTP_SV_EPOCH_M1_ACCEPTANCE.mdfor precise evidence/standards boundary and M2 physical acceptance.Limits / next gates
GPTimer is NOT yet continuously disciplined by the EMAC PTP clock. No universal IEC 61869-9 epoch rule is inferred for arbitrary profiles. No claim of IEC/IEEE 61850-9-3 conformance or zero IED sync alarms until hardware timestamps, sample phase stability, relay time lock, and canonical SV capture pass.
Do not merge or tag public release until C++/ESP/Qt/security CI AND real ESP32-P4 + representative IED acceptance are reviewed.
Standards-first software-only continuation (2026-10-14)
The current user has no relay/timing test equipment. Do not silently treat host simulations as IED acceptance.
include/ariec61850/time_sync/ptp_power_profile.hpp.tests/test_ptp_power_profile.cpp, Linux GCC/Clang + Windows MSVC CI, checking L2/0x88F7, multicast, Pdelay, 1 Hz Sync/Announce, sequence, identity, domain, VLAN, class 248 and no false traceability.tests/test_sv_ptp_epoch.cppnow also runs 120-second 4000/4800 rate/modulus mathematical schedule checks using the existing portableRationalTickSchedule(no second implementation).M1+ PTP/TAI source correctness (2026-10-14 continued)
PtpTimePropertiesflags are encoded consistently into PTPv2 Announce/Sync/Follow_Up/Pdelay. Low octet flagField is independently checked via raw wire octet tests, not only codec roundtrips.try_seed_ptp_tai_secondsbounds-checks a plausible UTC epoch, configured TAI-UTC offset, and uint32 ESP32-P4 EMAC seconds before seeding the clock. Hardware write is followed by bounded readback before flagging the PTP timescale.currentUtcOffsetValiddefaults to false; manual opt-inCONFIG_AR_PTP_MANUAL_UTC_OFFSET_VALIDadditionally requires successful TAI seed. NeithertimeTraceablenorfrequencyTraceablemay be asserted by LAB_SOURCE.clockClassor GPStimeSource.CI policy: Evaluate exact latest PR head SHA. Previous runs may be cancelled on subsequent pushes; do not treat an older green job as current-head evidence.