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M3C.3: include PTP/GPTimer clock-read uncertainty in SV phase tracking - #224
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masarray merged 6 commits intoOct 17, 2026
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masarray
merged commit Oct 17, 2026
2b68388
into
feature/esp32p4-smv-ptp-epoch-binding-m3c-20261015
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Root cause
The M3 software phase authority promoted
software_trackingafter N nominal phase readings within 60 µs, without accounting for uncertainty of the bracketed EMAC PTP/GPTimer clock read. A 400-µs read bracket could therefore satisfy the tracking predicate with >=201 µs uncertainty — an unfounded precision claim.Fix
abs(phase_error_us) + observation_uncertainty_us <= software_tracking_threshold_usbefore incrementing consecutive tracking samples.smpSynch=AUTOsemantics.Acceptance
Require exact-commit PTP Core CI GCC/Clang/MSVC before merge into experimental M3 base. Firmware hardware phase/egress and IED evidence still missing; no public release claim. Commit
02e30509d92743c88d3616417d22156ab5130c94.Exact-head CI remediation discovered during review
uint32_tassignment to optional VLAN ID/PCP; replaced with explicituint16_t/uint8_tconstants (no wire change).start_sample_clockcall while M3 uses PTP epoch arguments. It now locates the current call but retains its no-logging-after-timer assertion. Removed an actual post-armESP_LOGIfrom the firmware START path, preventing console work after the ISR starts firing.Newest exact head:
c776e7b0f324e0bb9dae4e578495448ff00fdbdb. CI results must be read at this head; earlier superseded workflow failures must not be claimed as current validation. No physical PTP–SV phase or IED lock claim.