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M3C.5: qualify SMV AUTO local synchronization using PTP phase + hardware MAC evidence - #232

Merged
masarray merged 7 commits into
feature/esp32p4-smv-ptp-epoch-binding-m3c-20261015from
feature/sv-ptp-auto-local-sync-evidence-20261017
Oct 17, 2026
Merged

masarray merged 7 commits into
feature/esp32p4-smv-ptp-epoch-binding-m3c-20261015from
feature/sv-ptp-auto-local-sync-evidence-20261017

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Root cause and operator goal

The firmware's SV AUTO phase-valid gate was permanently false; even a correctly disciplined sample clock could never advertise a measured smpSynch=1. Operators need direct PTP On → SMV Start for vendor-neutral IEC 61850 relay testing, not dialogs or manual flag workarounds.

Change

  • Add platform-independent SvLocalSyncEvidenceGate: canonical SV hardware descriptor timestamps must remain coherently near integer PTP seconds across two adjacent 16-second comparisons (three actual observations), within ±4µs, with matching source/session/fault generations, no missed slots or stalled descriptor.
  • Independent GPTimer↔EMAC observer must concurrently report software tracking and ≤4µs combined phase/read uncertainty. Eligible only in SOURCE mode, while fresh (≤17 SV epochs); no global synchronization claim.
  • Connect the gate to smpSynch=AUTO: qualify local value 1 only when the measurements support it; revoke on STOP, PTP role change/stop, failed canonical TX, missed samples, discontinuity, stale evidence and loss of software phase.
  • Keep real-time ISR unchanged. Common-case 4kHz work unchanged until qualification; only when local-qualified, verify PTP SOURCE live generation per frame to prevent a stale wire claim.
  • Add negative/positive hardware-evidence gate tests; document hardware/relay acceptance.

Validation contract

CI PTP Core GCC/Clang/MSVC; guarded ESP32-P4 SOURCE (phase servo + sparse hardware stamp enabled, broadcast mirror OFF), RECEIVER and default SMV build. This is an experimental M3 branch. The 4µs software/egress admission values are conservative implementation thresholds, not a universal standards tolerance. Without physical MAC phase measurements no claim that these gates can actually promote on a board, nor an alarm-free SIPROTEC relay. No vendor-specific wire hacks and no new GUI warnings or dialogs.

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📝 Code Review ⚠️ Failed 2026-10-17T12:19:23.247889Z 8e2faba PR opened
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@masarray
masarray merged commit bc7f5c2 into feature/esp32p4-smv-ptp-epoch-binding-m3c-20261015 Oct 17, 2026
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