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P0 Studio: preserve PTP–SV lock; improve 4I+4V fidelity and operator layouts - #244
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masarray merged 17 commits intoOct 18, 2026
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…ertically filled injection layout
…ertically filled injection layout
…ertically filled injection layout
…ertically filled injection layout
…ertically filled injection layout
…ble UI components
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…idelity acceptance
…annels instead of blank spacer
masarray
merged commit Oct 18, 2026
aa1a167
into
feature/studio-matched-ptp-sv-auto-20261017
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Non-regression boundary
No changes to PTP epoch servo, SV canonical packet schema, AUTO sample-phase criteria, MAC evidence, smpCnt or embedded firmware. User's verified 120s capture: 480294 canonical frames, 120 sequential smpCnt wraps, 120 PTP Sync/FUP/Announce, smpSynch=1, phase-alignment ~49us Windows RX proxy (not hardware sample phase).
Operator fixes
Hold for evidence
User observed GUI Ia=-30° with PCAP Ia=0°. Source contains table snapshot transaction but capture is not proven to correspond to same active setpoints. Do not label GUI values as wire readback. Need live start transaction logs/PCAP matched in time; tests guard serialization and GUI-to-START path, not falsely claim hardware proof.
CI
Native Qt + Windows lifecycle and exact-commit Windows preview; protect PTP/SV lock baseline from any unrelated UX changes.