[masarray]

Summary

Add a clean, vendor-neutral host-side foundation for compiling IEC 61850 SCL engineering intent into a normalized Sampled Values publisher profile. The branch has been rebased/rebuilt on current main; live-control runtime work is kept in a separate PR.

Implemented

• preserve SmvOpts element presence and flags in the SCL model;
• expand structured FCDA entries that omit daName into ordered leaf attributes using DataTypeTemplates, recursive DAType traversal and functional-constraint filtering;
• add normalized SvPublisherProfile compilation for MAC, APPID, VLAN, svID, confRev, sample rate/mode, nofASDU, optional-field policy, ordered leaf layout and deterministic payload width;
• keep sample-counter policy separate from sample-rate semantics: a rate-sized modulus may be exposed only as an unvalidated candidate; deployment requires a validated profile rule or observed evidence;
• add drift-free RationalTickSchedule for rates such as 4800 events/s instead of truncating to a fixed 208 us period;
• add an anonymous 4800 samples/s structured 4I+4V regression fixture;
• verify structured FCDA expansion into 16 ordered leaves (INT32, Quality) and a 64-byte payload;
• verify an explicitly validated 4800 counter modulus and exact 1 MHz rational schedule: 3200x208 + 1600x209 ticks = exactly one second;
• retain the exact 4000 events/s / 250-tick regression;
• document bounded dialect tolerance, configured-vs-observed truth separation and Class A/B/C deployment gates.

Interoperability rules

• no vendor/product-specific code paths or public proprietary fixtures;
• XML/type resolution stays host-side and outside the realtime hot path;
• unknown types, ambiguous DataSet bindings and incomplete runtime semantics are diagnosed instead of guessed;
• optional ASDU-field presence follows resolved SCL/profile semantics;
• smpSynch remains evidence-driven;
• counter wrap is not treated as universally derivable from SmpPerSec alone;
• real lab files are reduced to anonymous standards-relevant regression structures.

CI / acceptance

• Linux GCC/Clang build and tests on current head
• Windows/MSVC build and tests on current head
• Security/Evidence on current head
• Embedded/ESP32-P4 regression gates on current head
• anonymous structured 4800 profile regression included
• 4000 and 4800 rational scheduling regression included

Next

P3-A1 (#36) serializes only fully resolved Class-A runtime values into a versioned device profile, validates/activates it on ESP32-P4, and converges with the live signal runtime (#42 / PR #44) and hardware timestamp evidence.

Tracks #33, #35, #36 and #40; feeds #24.

[masarray]

Superseded by the completed SCL-driven injector integration in PR #54, which incorporated and extended this profile-foundation work and has now been merged to main. Closing this standalone foundation PR to keep the repository truth surface clean.