mlc-ai · tlopex · Aug 15, 2026 · Aug 15, 2026 · Aug 15, 2026 · Aug 15, 2026
diff --git a/appendix/index.md b/appendix/index.md
@@ -6,8 +6,8 @@ The main text runs through Parts I–IV. The Reference section collects material
 | Need | Where |
 |------|-----|
 | Look up a TIRx language feature | **{ref}`chap_language_reference`** |
-| Debug asynchronous GEMM/FA hangs, crashes, wrong results, or slowdowns | **{ref}`chap_warp_spec_debug`** |
 | Compiler internals (the lowering pipeline) | **{ref}`chap_arch`** |
+| Debug asynchronous GEMM/FA hangs, crashes, wrong results, or slowdowns | **{ref}`chap_warp_spec_debug`** |
 
 For the complete `tvm.tirx` Python API, see the
 [upstream TVM documentation](https://tvm.apache.org/docs/).

diff --git a/index.md b/index.md
@@ -87,6 +87,6 @@ chapter_flash_attention/index
 
 appendix/index
 tirx_guide/language_reference/index
-appendix/debugging_warp_specialized
 tirx_guide/arch/index
+appendix/debugging_warp_specialized
 ```
diff --git a/tirx_guide/arch/index.rst b/tirx_guide/arch/index.rst
@@ -20,7 +20,10 @@
 Compiler Internals
 ==================
 
-Internals of the TIRx compiler, for contributors.
+This section explains how the TIRx compiler lowers an authored module into a
+CPU-side launcher and GPU device code. It follows the compilation pipeline from
+high-level TIRx constructs through host/device separation and CUDA code
+generation.
 
 .. toctree::
    :maxdepth: 1

diff --git a/tirx_guide/arch/lowering_pipeline.rst b/tirx_guide/arch/lowering_pipeline.rst
diff --git a/zh/appendix/index.md b/zh/appendix/index.md
@@ -6,8 +6,8 @@
 | 需要查询的内容 | 对应页面 |
 |---|---|
 | TIRx 语言特性的准确写法和语义 | **{ref}`chap_language_reference`** |
-| 排查异步 GEMM 或 Flash Attention kernel 的卡死、崩溃、错误结果和性能下降 | **{ref}`chap_warp_spec_debug`** |
 | 编译器内部机制与 lowering 流程 | **{ref}`chap_arch`** |
+| 排查异步 GEMM 或 Flash Attention kernel 的卡死、崩溃、错误结果和性能下降 | **{ref}`chap_warp_spec_debug`** |
 
 完整的 `tvm.tirx` Python API 请参阅
 [TVM 官方文档](https://tvm.apache.org/docs/)。

diff --git a/zh/index.md b/zh/index.md
@@ -64,6 +64,6 @@ chapter_flash_attention/index
 
 appendix/index
 tirx_guide/language_reference/index
-appendix/debugging_warp_specialized
 tirx_guide/arch/index
+appendix/debugging_warp_specialized
 ```
diff --git a/zh/tirx_guide/arch/index.rst b/zh/tirx_guide/arch/index.rst
@@ -20,7 +20,7 @@
 编译器内部机制
 ==============
 
-本节面向 TIRx 贡献者，介绍编译器内部的工作方式。
+本节介绍 TIRx 编译器如何将编写好的 module 转换成 CPU 端的启动函数和 GPU 端的 device code，并沿着编译流水线说明 TIRx 高层结构、host/device 拆分以及 CUDA 代码生成之间的关系。
 
 .. toctree::
    :maxdepth: 1

diff --git a/zh/tirx_guide/arch/lowering_pipeline.rst b/zh/tirx_guide/arch/lowering_pipeline.rst