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1. nasdaq-pipeline nasdaq-pipeline Public

   Hardware-accelerated (FPGA) HFT trading pipeline for NASDAQ TotalView-ITCH 5.0 market data. Implements an async FIFO, MoldUDP64 deframer, ITCH parser, L1/L2/L3 limit order book, and trade signal en…

   C++ 11 3

2. matmul matmul Public

   Parameterized matrix-multiply accelerator (FPGA), built three ways: sequential, systolic, and systolic with BRAM. SystemVerilog RTL verified in cocotb against a Python golden model under randomized…

   SystemVerilog 4

3. custdiv-tile-fts custdiv-tile-fts Public

   Custom divider tile in FTS flow.

   Verilog 3

4. protocol-emulator-ASIC protocol-emulator-ASIC Public

   Attempt at Jane Street's challenge to design an "open-source, general-purpose protocol emulator ASIC." (https://blog.janestreet.com/protocol-emulator-asic-competition/)

   1