Skip to content

About

2-layer analogue front end (AFE) signal conditioning pipeline made in KiCad, and simulated in LTspice. This design target an audio application

Topics

Resources

Stars

0 stars

Watchers

0 watching

Forks

Latest commit

 

History

26 Commits

Folders and files

NameName
Last commit message
Last commit date
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Signal Conditioning Pipeline

Overview

A comprehensive project documenting the design, simulation, and physical layout of an analogue signal conditioning circuit. It bridges theoretical modeling with hardware implementation.

Design Workflow

  1. Simulation: Frequency and transient response modeling verified in LTspice.
  2. Schematic Capture: Component selection and schematic design in KiCad.
  3. Layout: Low-noise PCB routing focusing on ground planes and trace separation.

Repository Structure

  • /simulation: LTspice simulation files (.asc) and plots.
  • /hardware: KiCad schematic and PCB layout files.
  • /outputs: Gerber files and manufacturing documentation.

About

2-layer analogue front end (AFE) signal conditioning pipeline made in KiCad, and simulated in LTspice. This design target an audio application

Topics

Resources

Stars

0 stars

Watchers

0 watching

Forks

Releases

Packages

Contributors