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RISC-V: Fix XCVALU extension patterns#114

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FondazioneChipsIT:fix-xcvalu-extension-patterns
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RISC-V: Fix XCVALU extension patterns#114
gtagliavini wants to merge 1 commit into
openhwgroup:developmentfrom
FondazioneChipsIT:fix-xcvalu-extension-patterns

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Remove redundant truncate operations from the XCVALU sign- and zero-extension patterns. The input operands already have the proper QI or HI mode, so the truncate expressions are unnecessary and make the RTL pattern less canonical.

Also prevent the generic SI sign-extension split from being used for XCVALU on RV32, where dedicated cv.ext* instructions are available.

gcc/ChangeLog:

* config/riscv/riscv.md (riscv_cv_alu_exths): Remove redundant truncate. (riscv_cv_alu_exthz): Likewise. (riscv_cv_alu_extbs): Likewise. (riscv_cv_alu_extbz): Likewise. (*extend<SHORT:mode><SUPERQI:mode>2): Disable split for XCVALU on RV32.

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Remove redundant truncate operations from the XCVALU sign- and
zero-extension patterns.  The input operands already have the proper
QI or HI mode, so the truncate expressions are unnecessary and make the
RTL pattern less canonical.

Also prevent the generic SI sign-extension split from being used for
XCVALU on RV32, where dedicated cv.ext* instructions are available.

gcc/ChangeLog:

	* config/riscv/riscv.md (riscv_cv_alu_exths): Remove redundant
	truncate.
	(riscv_cv_alu_exthz): Likewise.
	(riscv_cv_alu_extbs): Likewise.
	(riscv_cv_alu_extbz): Likewise.
	(*extend<SHORT:mode><SUPERQI:mode>2): Disable split for XCVALU
	on RV32.
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