Skip to content
Change the repository type filter

All

    Repositories list

    • tiliqua

      Public
      A powerful, hackable FPGA-based audio multitool for Eurorack.
      Python
      CERN Open Hardware Licence Version 2 - Strongly Reciprocal
      17143163Updated Jun 5, 2026Jun 5, 2026
    • An embeddable FPGA SoM designed for high-speed audio and USB applications.
      CERN Open Hardware Licence Version 2 - Strongly Reciprocal
      42800Updated Jun 4, 2026Jun 4, 2026
    • Separate repository for Tiliqua KiCAD projects.
      OpenSCAD
      CERN Open Hardware Licence Version 2 - Strongly Reciprocal
      0210Updated May 13, 2026May 13, 2026
    • Flash Tiliqua bitstreams from a web browser. Built on WebUSB.
      HTML
      0100Updated Apr 26, 2026Apr 26, 2026
    • sandflat

      Public
      Lower-cost DSP experimentation host for the SoldierCrab ECP5 SoM
      Python
      CERN Open Hardware Licence Version 2 - Strongly Reciprocal
      0400Updated Apr 21, 2026Apr 21, 2026
    • apfbug

      Public
      RP2040 firmware for debugger on Tiliqua hardware. Includes support for replaying recorded JTAG streams for ECP5 multiboot.
      C
      MIT License
      71210Updated Apr 5, 2026Apr 5, 2026
    • Separate repository for 'Tiliqua Screen' CAD projects
      Rust
      CERN Open Hardware Licence Version 2 - Strongly Reciprocal
      0000Updated Mar 11, 2026Mar 11, 2026
    • guh

      Public
      Experimental USB2 HS/FS host primitives for FPGAs.
      Python
      BSD 3-Clause "New" or "Revised" License
      11200Updated Feb 8, 2026Feb 8, 2026
    • A eurorack-friendly audio frontend compatible with many FPGA boards, based on the AK4619VN audio CODEC.
      SystemVerilog
      Other
      1623310Updated Jan 29, 2026Jan 29, 2026
    • Example of using a eurorack-pmod as an 8-channel (4in + 4out) USB sound card, based on the LUNA project.
      Python
      BSD 3-Clause "New" or "Revised" License
      01310Updated Nov 18, 2025Nov 18, 2025
    • eurorack-pmod-litex

      Public archive
      Audio DSP on an FPGA using eurorack-pmod + LiteX with firmware in Rust.
      Python
      31700Updated Oct 7, 2025Oct 7, 2025
    • An example of simulating Verilog / FPGA gateware inside a VCV Rack plugin.
      C++
      54300Updated Jul 27, 2025Jul 27, 2025
    • An auto-resetting USB power supply that takes Eurorack +12V in.
      Rust
      0000Updated Jan 25, 2025Jan 25, 2025
    ProTip! When viewing an organization's repositories, you can use the props. filter to filter by custom property.