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    22 repositories

    • kepler-formal

      Public
      Digital Design Equivalence Checking
      asicfpgavhdl
      asicfpgavhdlverificationedaformal-verificationsemiconductorsecasic-verificationlec
      C++
      •
      Apache License 2.0
      •15•110•11•22•Updated Oct 10, 2026Oct 10, 2026

    • naja-if

      Public
      Cap'n Proto
      •
      Apache License 2.0
      •0•2•0•0•Updated Oct 10, 2026Oct 10, 2026

    • pavona

      Public
      A library of modular, tapeout-proven, and secure-by-default open silicon blocks
      SystemVerilog
      •
      Apache License 2.0
      •30•0•0•0•Updated Oct 10, 2026Oct 10, 2026

    • OpenROAD-flow-scripts-KF

      Public
      OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
      Verilog
      •
      Other
      •537•0•0•0•Updated Oct 9, 2026Oct 9, 2026

    • .github

      Public
      Apache License 2.0
      •0•0•0•0•Updated Oct 9, 2026Oct 9, 2026

    • keplertech-web

      Public
      HTML
      •0•0•0•0•Updated Oct 9, 2026Oct 9, 2026

    • naja-verilog

      Public
      A standalone structural (gate-level) verilog parser
      parsercppeda
      parsercppedaverilognetlistsemiconductornetlist-parserelectronic-design-automation
      C++
      •
      Apache License 2.0
      •3•43•0•0•Updated Oct 9, 2026Oct 9, 2026

    • naja-schematic

      Public
      Portable netlist schematic viewer for the naja data model
      imguiedanetlist
      imguiedanetlistschematic-viewer
      Verilog
      •
      Apache License 2.0
      •0•3•2•0•Updated Oct 8, 2026Oct 8, 2026

    • naja-scope

      Public
      MCP server for AI agents to explore SystemVerilog/Verilog netlists: trace connectivity, walk hierarchy, jump to source - without pasting RTL into context. Built…
      mcpedaverilog
      mcpedaverilogsystemverilognetlistai-agentsmcp-server
      Python
      •
      Apache License 2.0
      •2•17•0•1•Updated Oct 6, 2026Oct 6, 2026

    • OpenROAD

      Public
      OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
      Verilog
      •
      BSD 3-Clause "New" or "Revised" License
      •1k•0•0•1•Updated Oct 1, 2026Oct 1, 2026

    • 22b

      Public
      Python
      •0•0•0•1•Updated Sep 30, 2026Sep 30, 2026

    • kepler-formal-mcp

      Public
      Python
      •1•0•0•1•Updated Sep 17, 2026Sep 17, 2026

    • kepler-formal-action

      Public
      Logic equivalence checking for RTL and gate-level design changes in CI
      Shell
      •
      Apache License 2.0
      •0•2•0•0•Updated Sep 15, 2026Sep 15, 2026

    • xls

      Public
      XLS: Accelerated HW Synthesis
      C++
      •
      Apache License 2.0
      •294•0•0•0•Updated Sep 14, 2026Sep 14, 2026

    • kepler-formal-regress

      Public
      Verilog
      •0•3•0•0•Updated Aug 3, 2026Aug 3, 2026

    • systemc-compiler

      Public
      This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
      C++
      •
      Other
      •47•0•0•0•Updated Jul 29, 2026Jul 29, 2026

    • metron

      Public
      A C++ to Verilog translation tool with some basic guarantees that your code will work.
      C++
      •
      MIT License
      •16•0•0•0•Updated Jun 28, 2026Jun 28, 2026

    • kepler-formal-testing-agent

      Public
      1•0•0•0•Updated Jun 4, 2026Jun 4, 2026

    • najaKF

      Public
      Structural Netlist API (and more) for EDA post synthesis flow development
      Verilog
      •
      Apache License 2.0
      •26•0•0•0•Updated Mar 12, 2026Mar 12, 2026

    • bazel-orfs

      Public
      HTML
      •
      BSD 3-Clause "New" or "Revised" License
      •24•0•0•0•Updated Feb 2, 2026Feb 2, 2026

    • najaeda-scripts

      Public
      Verilog
      •0•0•0•0•Updated Dec 15, 2025Dec 15, 2025

    • OpenROAD-KF

      Public
      OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
      Verilog
      •
      BSD 3-Clause "New" or "Revised" License
      •1k•0•0•0•Updated Aug 18, 2025Aug 18, 2025
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