docs: open v003 and Tools links in new tabs; remove toolchain demos + v003 later roadmap

README.md

@@ -166,7 +166,7 @@ Sibling repositories:
 - **`pccx-v002`** — reusable v002 IP-core package.
 - **`pccx-v003`** — future reusable v003 IP-core package.
 - **[pccxai/pccx-FPGA-NPU-LLM-kv260](https://github.com/pccxai/pccx-FPGA-NPU-LLM-kv260)** — KV260 + LLM application integration that consumes `pccx-v002`.
-- **[pccxai/pccx-lab](https://github.com/pccxai/pccx-lab)** — performance simulator, CLI-first verification lab, and trace profiler. The public Lab documentation lives on `https://labs.pccx.ai/`.
+- **[pccxai/pccx-lab](https://github.com/pccxai/pccx-lab)** — performance simulator, CLI-first verification lab, and trace profiler. The public Lab documentation lives on `https://docs.altifigence.com/lab/`.
 
 ---
 
@@ -202,7 +202,7 @@ the speculative-decoding stack is integrated.
 Performance simulator, CLI-first verification lab, and trace profiler for the pccx NPU. Pre-RTL bottleneck detection, UVM co-simulation, and testbench/trace workflow support share one workflow.
 
 - Repository: https://github.com/pccxai/pccx-lab
-- Documentation: https://labs.pccx.ai/
+- Documentation: https://docs.altifigence.com/lab/
 - Status: Work in Progress
 
 ---

_static/pccx-version-switcher.js

@@ -74,6 +74,11 @@
     if (clickable) {
       node.href = url;
       node.dataset.pccxVersionUrl = url;
+      // External links (v003 etc.) should open in a new tab
+      if (url.startsWith("http://") || url.startsWith("https://")) {
+        node.target = "_blank";
+        node.rel = "noopener noreferrer";
+      }
     } else {
       node.classList.add("is-disabled");
       node.setAttribute("aria-disabled", "true");
@@ -100,6 +105,20 @@
       tree.insertBefore(wrapper, tree.firstChild);
     }
     switcher.hidden = false;
+
+    // Upgrade any external links in the sidebar (Tools section etc.) to open in new tab
+    upgradeExternalSidebarLinks();
+  }
+
+  function upgradeExternalSidebarLinks() {
+    const sidebar = document.querySelector(".sidebar-tree");
+    if (!sidebar) return;
+    sidebar.querySelectorAll('a[href^="http"]').forEach((a) => {
+      if (!a.target) {
+        a.target = "_blank";
+        a.rel = "noopener noreferrer";
+      }
+    });
   }
 
   function render(entries) {
@@ -134,8 +153,12 @@
   }
 
   if (document.readyState === "loading") {
-    document.addEventListener("DOMContentLoaded", main, { once: true });
+    document.addEventListener("DOMContentLoaded", () => {
+      upgradeExternalSidebarLinks();
+      main();
+    }, { once: true });
   } else {
+    upgradeExternalSidebarLinks();
     main();
   }
 })();

_static/pccx_versions.json

@@ -12,10 +12,10 @@
   {
     "label": "v003",
     "slug": "v003",
-    "url": "/en/docs/v003/",
+    "url": "https://docs.altifigence.com/v003/",
     "urls": {
-      "en": "/en/docs/v003/",
-      "ko": "/ko/docs/v003/"
+      "en": "https://docs.altifigence.com/v003/",
+      "ko": "https://docs.altifigence.com/v003/"
     },
     "status": "available"
   },

_templates/sidebar/brand.html

@@ -56,7 +56,7 @@
     <span class="pccx-repolinks__label">RTL</span>
   </a>
   <a class="pccx-repolinks__btn"
-     href="https://labs.pccx.ai/"
+     href="https://docs.altifigence.com/lab/"
      title="pccx-lab — verification lab and trace profiler"
      rel="noopener">
     <svg aria-hidden="true" viewBox="0 0 24 24" width="1em" height="1em"
@@ -69,7 +69,7 @@
     <span class="pccx-repolinks__label">Lab</span>
   </a>
   <a class="pccx-repolinks__btn"
-     href="https://launcher.pccx.ai/"
+     href="https://docs.altifigence.com/launcher/"
      title="PCCX Launcher — contracts and readiness"
      rel="noopener">
     <svg aria-hidden="true" viewBox="0 0 24 24" width="1em" height="1em"
@@ -81,7 +81,7 @@
     <span class="pccx-repolinks__label">Launcher</span>
   </a>
   <a class="pccx-repolinks__btn"
-     href="https://ide.pccx.ai/"
+     href="https://docs.altifigence.com/ide/"
      title="SystemVerilog IDE — diagnostics and validation"
      rel="noopener">
     <svg aria-hidden="true" viewBox="0 0 24 24" width="1em" height="1em"

conf_common.py

@@ -296,7 +296,7 @@ def build_footer_icons(lang_prefix: str = "en") -> list:
         },
         {
             "name":  "pccx-lab — simulator & verification lab",
-            "url":   "https://labs.pccx.ai/",
+            "url":   "https://docs.altifigence.com/lab/",
             "class": "pccx-footer-icon",
             "html": (
                 _ICON_BEAKER
@@ -305,7 +305,7 @@ def build_footer_icons(lang_prefix: str = "en") -> list:
         },
         {
             "name":  "PCCX Launcher — launcher contracts and readiness",
-            "url":   "https://launcher.pccx.ai/",
+            "url":   "https://docs.altifigence.com/launcher/",
             "class": "pccx-footer-icon",
             "html": (
                 _ICON_CHIP
@@ -314,7 +314,7 @@ def build_footer_icons(lang_prefix: str = "en") -> list:
         },
         {
             "name":  "SystemVerilog IDE — diagnostics and validation",
-            "url":   "https://ide.pccx.ai/",
+            "url":   "https://docs.altifigence.com/ide/",
             "class": "pccx-footer-icon",
             "html": (
                 _ICON_PERSON

docs/index.rst

@@ -188,14 +188,14 @@ Altifigence.
             **github.com/pccxai/pccx** — the Sphinx project powering this site.
 
          .. grid-item-card:: :octicon:`telescope;1em;sd-mr-1` pccx-lab (verify / profile)
-            :link: https://labs.pccx.ai/
+            :link: https://docs.altifigence.com/lab/
             :link-type: url
             :link-alt: Open the pccx-lab verification + profiling hub
 
             **pccx-lab** — Tauri 2 IDE. ``.pccx`` trace loader,
             ``run_verification`` runner, Roofline / Bottleneck cards,
             Vivado synth report view. See the
-            `dedicated lab documentation site <https://labs.pccx.ai/>`_.
+            `dedicated lab documentation site <https://docs.altifigence.com/lab/>`_.
 
          .. grid-item-card:: :octicon:`person;1em;sd-mr-1` Author portfolio
             :link: https://hkimw.github.io/hkimw/

docs/roadmap.md

@@ -49,22 +49,6 @@ Tracking issue: [pccxai/pccx#28 — v0.2.0 umbrella][v020].
 - compute budget for EAGLE head training: $70–100 ($40 if a TRC TPU
   grant lands)
 
-## Later — v003.x: separate RTL repository (LLM line continued)
-
-- v003+ active RTL development lives in
-  [`pccx-v003`](https://github.com/pccxai/pccx-v003), the canonical
-  v003 IP-core planning package; no v003 release branch has stabilised
-  yet (the earlier feeder
-  [`pccx-LLM-v003`](https://github.com/pccxai/pccx-LLM-v003) is
-  superseded / retired)
-- this docs repo will cross-link the v003 IP-core package and CI-clone
-  it into `codes/v003/` at build time, the same way it currently
-  CI-clones `pccx-FPGA-NPU-LLM-kv260` into `codes/v002/`
-- v003.0 — Gemma 4 E4B foundation + first architectural novelty (planning);
-  throughput TBD
-- v003.1 — second novelty + KV / decoding co-design; throughput TBD
-- placeholder track index: [docs.altifigence.com — v003](https://docs.altifigence.com/v003/)
-
 ## Parallel — vision-v001: CNN inference track on KV260
 
 A second product line scoped to **vision** workloads shares the same
@@ -90,11 +74,10 @@ dedicated repository.
 :name: fig-pccx-family-tree-en
 :alt: pccx product family tree across versions and tracks
 
-v001 (archived) → v002 (active KV260 LLM line: v002.0 → v002.1) →
-v003.x (LLM line continued, separate RTL repository). The
-**vision-v001** track branches at the v002 KV260 substrate and runs
-in parallel on its own repository. Hover any node for status and
-scope.
+v001 (archived) → v002 (active KV260 LLM line: v002.0 → v002.1).
+The **vision-v001** track branches at the v002 KV260 substrate and runs
+in parallel on its own repository. v003+ and other tracks live at
+docs.altifigence.com. Hover any node for status and scope.
 ```
 
 ## Links

docs/samples/index.md

@@ -1,3 +1,7 @@
+---
+orphan: true
+---
+
 # Toolchain Demos
 
 Reference pages exercising every diagram / plot pipeline wired into the

docs/v002/gemma3n-e4b-integration.rst

@@ -103,19 +103,19 @@ Live Surface Map
      - Daemon dependency
      - Issue tracker
    * - pccx-lab Live Run
-     - https://labs.pccx.ai/live-run/
+     - https://docs.altifigence.com/lab/
      - ``/api/status`` plus optional status WebSocket frames.
      - https://github.com/pccxai/pccx-lab/issues
    * - pccx-trace Live Capture
      - https://trace.pccx.ai/live-capture/
      - ``/api/trace`` NDJSON timeline stream.
      - https://github.com/pccx-internal/pccx-trace/issues
    * - systemverilog-ide Board Health
-     - https://ide.pccx.ai/board-health/
+     - https://docs.altifigence.com/ide/
      - ``/api/status`` board, backend, and SHA fields.
      - https://github.com/pccxai/systemverilog-ide/issues
    * - pccx-launcher chat
-     - https://launcher.pccx.ai/chat/
+     - https://docs.altifigence.com/launcher/
      - ``/api/status`` preflight plus chat WebSocket events.
      - https://github.com/pccxai/pccx-launcher/issues
 

index.rst

@@ -70,7 +70,7 @@ Tooling & Lab
    :class-container: pccx-toolchain-grid
 
    .. grid-item-card:: :octicon:`beaker;1.2em;sd-mr-1` pccx-lab
-      :link: https://labs.pccx.ai/
+      :link: https://docs.altifigence.com/lab/
       :link-type: url
       :link-alt: Open the pccx-lab verification lab
       :class-card: pccx-lab-card
@@ -84,7 +84,7 @@ Tooling & Lab
       Source: github.com/pccxai/pccx-lab
 
    .. grid-item-card:: :octicon:`rocket;1.2em;sd-mr-1` PCCX Launcher
-      :link: https://launcher.pccx.ai/
+      :link: https://docs.altifigence.com/launcher/
       :link-type: url
       :link-alt: Open the PCCX Launcher documentation
 
@@ -94,7 +94,7 @@ Tooling & Lab
       :bdg-warning:`Private source`
 
    .. grid-item-card:: :octicon:`terminal;1.2em;sd-mr-1` SystemVerilog IDE
-      :link: https://ide.pccx.ai/
+      :link: https://docs.altifigence.com/ide/
       :link-type: url
       :link-alt: Open the SystemVerilog IDE documentation
 
@@ -143,16 +143,10 @@ Tooling & Lab
 
    docs/archive/index
 
-.. toctree::
-   :maxdepth: 1
-   :caption: Toolchain Demos
-
-   docs/samples/index
-
 .. toctree::
    :maxdepth: 1
    :caption: Tools
 
-   pccx-lab — Verification Lab <https://labs.pccx.ai/>
-   PCCX Launcher <https://launcher.pccx.ai/>
-   SystemVerilog IDE <https://ide.pccx.ai/>
+   pccx-lab — Verification Lab <https://docs.altifigence.com/lab/>
+   PCCX Launcher <https://docs.altifigence.com/launcher/>
+   SystemVerilog IDE <https://docs.altifigence.com/ide/>

ko/docs/roadmap.md

@@ -47,22 +47,6 @@ KV260 bring-up `[HW]` → 런타임 `[HW]` → 릴리스 증거 체크리스트
 - EAGLE head 학습용 컴퓨트 예산: $70–100 (TRC TPU grant 가
   들어오면 $40)
 
-## Later — v003.x: 별도 RTL 저장소 (LLM 라인 후속)
-
-- v003+ 의 활성 RTL 개발은
-  [`pccx-v003`](https://github.com/pccxai/pccx-v003) — 정본 v003
-  IP-core 계획 패키지 — 에서 진행되며, 안정된 릴리스 브랜치는 아직
-  없다 (이전 feeder
-  [`pccx-LLM-v003`](https://github.com/pccxai/pccx-LLM-v003) 은
-  superseded / retired)
-- 이 문서 저장소는 v003 IP-core 패키지를 cross-link 하고 빌드 시
-  `codes/v003/` 로 CI-clone 한다 — 현재
-  `pccx-FPGA-NPU-LLM-kv260` 를 `codes/v002/` 로 CI-clone 하는 것과
-  같은 방식
-- v003.0 — Gemma 4 E4B 파운데이션 + 첫 아키텍처 novelty (planning); 처리량 TBD
-- v003.1 — 두 번째 novelty + KV / 디코딩 co-design; 처리량 TBD
-- 트랙 placeholder 인덱스: [docs.altifigence.com — v003](https://docs.altifigence.com/v003/)
-
 ## Parallel — vision-v001: KV260 위 CNN 추론 트랙
 
 LLM 라인과는 별개로, **vision** 워크로드 전용 두 번째 제품 라인을
@@ -87,10 +71,10 @@ LLM 라인과는 별개로, **vision** 워크로드 전용 두 번째 제품 라
 :name: fig-pccx-family-tree-ko
 :alt: pccx 제품군 트리 — 버전과 트랙별 분기
 
-v001 (archived) → v002 (활성 KV260 LLM 라인: v002.0 → v002.1) →
-v003.x (LLM 라인 후속, 별도 RTL 저장소). **vision-v001** 트랙은
-v002 KV260 substrate 에서 분기되어 자체 저장소에서 평행하게
-진행된다. 노드에 hover 하면 상태와 범위가 표시된다.
+v001 (archived) → v002 (활성 KV260 LLM 라인: v002.0 → v002.1).
+**vision-v001** 트랙은 v002 KV260 substrate 에서 분기되어 자체 저장소에서
+평행하게 진행된다. v003+ 등 다른 트랙은 docs.altifigence.com 에 있습니다.
+노드에 hover 하면 상태와 범위가 표시된다.
 ```
 
 ## 링크

ko/docs/samples/index.md

@@ -1,3 +1,7 @@
+---
+orphan: true
+---
+
 # 툴체인 데모
 
 pccx Sphinx 빌드에 연결된 모든 다이어그램 · 플롯 파이프라인을 한 번씩 쓰는

ko/index.rst

@@ -47,14 +47,14 @@ pccx는 엣지 디바이스에서 Transformer 기반 LLM을 가속하기 위한
             **github.com/pccxai/pccx** — 이 사이트를 빌드하는 Sphinx 프로젝트.
 
          .. grid-item-card:: :octicon:`telescope;1em;sd-mr-1` pccx-lab (검증 / 프로파일)
-            :link: https://pccx.ai/ko/lab/
+            :link: https://docs.altifigence.com/lab/
             :link-type: url
             :link-alt: pccx-lab 검증·프로파일링 허브 열기
 
             **pccx-lab** — Tauri 2 IDE. ``.pccx`` 트레이스 로딩,
             ``run_verification`` 러너, Roofline / Bottleneck 카드,
             Vivado synth 리포트 뷰.
-            `검증 워크플로우 가이드 <https://pccx.ai/ko/lab/verification-workflow.html>`_
+            `검증 워크플로우 가이드 <https://docs.altifigence.com/lab/>`_
 
          .. grid-item-card:: :octicon:`person;1em;sd-mr-1` 저자 포트폴리오
             :link: https://hkimw.github.io/hkimw/
@@ -80,7 +80,7 @@ v003 산출물을 사용합니다.
    :class-container: pccx-toolchain-grid
 
    .. grid-item-card:: :octicon:`beaker;1.2em;sd-mr-1` pccx-lab
-      :link: https://pccx.ai/ko/lab/
+      :link: https://docs.altifigence.com/lab/
       :link-type: url
       :link-alt: pccx-lab 시뮬레이터 & 프로파일러 열기
       :class-card: pccx-lab-card
@@ -94,7 +94,7 @@ v003 산출물을 사용합니다.
       소스: github.com/pccxai/pccx-lab
 
    .. grid-item-card:: :octicon:`project-roadmap;1.2em;sd-mr-1` 설계 근거
-      :link: https://pccx.ai/ko/lab/design/rationale.html
+      :link: https://docs.altifigence.com/lab/
       :link-type: url
       :link-alt: pccx-lab 설계 근거 읽기
 
@@ -141,14 +141,10 @@ v003 산출물을 사용합니다.
 
    docs/archive/index
 
-.. toctree::
-   :maxdepth: 1
-   :caption: 툴체인 데모
-
-   docs/samples/index
-
 .. toctree::
    :maxdepth: 1
    :caption: 도구
 
-   pccx-lab — 시뮬레이터 & AI 프로파일러 <https://pccx.ai/ko/lab/>
+   pccx-lab — Verification Lab <https://docs.altifigence.com/lab/>
+   PCCX Launcher <https://docs.altifigence.com/launcher/>
+   SystemVerilog IDE <https://docs.altifigence.com/ide/>