docs(reference): types.md AVX-512BW + missing unsigned wider-int gap - #33
Merged
Conversation
The 512-bit AVX-512 section listed only f32x16, f64x8, i32x16 — none
of the AVX-512BW byte/word integer types (i8x64, u8x64, i16x32,
u16x32) or the AVX-512F u64x8. The 128-bit and 256-bit sections were
also missing unsigned wider-integer types (u32x4, u64x2, u64x4). All
were already accepted by the lexer; the table just hadn't kept up
across v1.12.0 (u64x{2,4,8}) and v1.14.0 (u16x32).
Surfaced as a follow-up flagged by the v1.14.0 u16x32 PR #29 spec
post-mortem. The 512-bit section gained a "Feature" column
distinguishing AVX-512F (foundation) from AVX-512BW (byte/word) so
readers can predict which CPUs accept which types.
Also adds a brief subsection acknowledging f16x{4,8} and the
sub-128-bit narrow widths (i8x{4,8}, u8x8, i16x4, u16x4, i32x2)
exist with target-specific semantics, with pointers to where they're
documented in context (ARM reference for f16, intrinsics reference
for the narrow-width consumers like wmul_i32).
Doc-only — no code or public-api change.
Co-Authored-By: Claude Opus 4.7 (1M context) <noreply@anthropic.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
1 participant
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Doc-only fix for a gap that surfaced in the v1.14.0 `u16x32` PR #29 spec post-mortem: `docs/src/reference/types.md` was missing entries for types the lexer has accepted since v1.12.0 (`u64x{2,4,8}`) and v1.14.0 (`u16x32`), and had never documented the AVX-512BW byte/word integer types at all.
Added to the tables
128-bit: `u32x4`, `u64x2`
256-bit: `u64x4`
512-bit: `u64x8` (AVX-512F), `i16x32`, `u16x32`, `i8x64`, `u8x64` (AVX-512BW)
The 512-bit table gained a "Feature" column so readers can predict which CPUs accept which types — AVX-512F is on Skylake-SP+; AVX-512BW is on Skylake-SP, Ice Lake, Zen 4, and later.
Also added
Brief subsection noting that `f16x{4,8}` and the sub-128-bit narrow widths (`i8x{4,8}`, `u8x8`, `i16x4`, `u16x4`, `i32x2`) exist with target-specific semantics, pointing readers to the ARM reference for `f16` and the intrinsics reference for the narrow-width consumers like `wmul_i32(i16x4, i16x4)`. Those have prose-heavy semantics that don't fit the same table format.
Test plan
🤖 Generated with Claude Code