chore: cut v1.14.0

[petlukk]

Summary

Release-cut PR for v1.14.0: CHANGELOG date + Cargo version bump. After this merges to `main`, tag and push from the merge commit:

```bash
git checkout main && git pull
git tag -a v1.14.0 -m "Release v1.14.0"
git push origin v1.14.0
```

Release-ritual status (per RELEASING.md)

• Step 2 — x86 baselines: `gather_compose` clean (sub-1% drift); `exp_poly_f32` shows one >10% regression on `softmax_libm` (the libm reference path, not the Eä polynomial kernel). Both Eä-side kernels (`exp_only_poly`, `softmax_poly`) drifted ≤3%. Consistent with the existing RELEASING.md note that "CI runner deltas often 20%+ on libm-backed kernels" — not gating.
• Step 3 — CHANGELOG: renamed `UNRELEASED` → `2026-05-19` with a release summary paragraph. 71 commits since v1.13.0; every commit is reflected in an existing entry or is an internal refactor with no behavior change (PR chore(v1.14.0): bring intrinsics.rs + phase14 tests under 500-line rule #34 hard-rules cleanup).
• Step 3 — version bump: `Cargo.toml` 1.13.0 → 1.14.0; `Cargo.lock` regenerated.
• Step 3 — migration doc: not needed. All v1.14.0 entries are additive; no removals, no signature changes.
• Step 3 — public-api snapshot: already refreshed in PR feat: u16x32 token + lo256/hi256_u16x32 lane extractors #29 (`TokenKind::U16x32`); PR chore(v1.14.0): bring intrinsics.rs + phase14 tests under 500-line rule #34 cleanup didn't change public surface.
• Step 4 — final test pass: `cargo test --tests --features=llvm` → 983 pass, 0 fail.
• Step 1 — Pi 5 baselines: skipped here (requires `ssh peter@10.46.0.27` which is maintainer-only network). RELEASING.md says "do this first" because of intermittent access — recommend running before tag-push if Pi is reachable; otherwise the warn-only `ea bench` regression gate makes this non-blocking.

v1.14.0 highlights

Surface	What shipped
Transcendentals	`tanh_approx_f32`, `log_approx_f32`, `sin_approx_f32`, `cos_approx_f32` — joins `exp_poly_f32` (v1.11.0)
Integer SIMD	`u16x32` token + `lo256_u16x32` / `hi256_u16x32` lane extractors; fused `wmul_u64(u32x4, u32x4) -> u64x4`
Olorin primitives	`permute_runtime` (AVX2), `prefetch_write` / `prefetch_nta`, two-source `shuffle(a, b, [indices])`
Docs	`types.md` AVX-512BW gap closed; cookbook tanh-GELU recipe rewritten to use `tanh_approx_f32`
Internal	`intrinsics.rs` split into `intrinsics_transcendental.rs` + `intrinsics_prefetch.rs` for the 500-line rule

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