astral-v1.0

What's Changed

• Use bender for vendoring lowrisc files by @micprog in #13
• Update ECC memory and add SECDED correctors by @micprog in #14
• Fix broken url by @wi24rd in #10
• Add SystemVerilog Hsiao modules by @micprog in #16
• Fix ECC synthesizability by @micprog in #18
• Cleanup of ECC modules & SRAM by @micprog in #22
• Voter Macros by @Lynx005F in #25
• Add internal CI tests by @micprog in #29
• Fix synthesis problems with Voter Macros in synopsys dc by @Lynx005F in #28
• Add minimum ecc requirement function by @micprog in #31

New Contributors

• @wi24rd made their first contribution in #10
• @Lynx005F made their first contribution in #25

Full Changelog: v0.5.1...astral-v1.0

v0.5.1

Added

• Add CI flow for linting

Fixed

• Fix ECC SRAM wrap

v0.5.0

Added

• Add pulpissimo_tcls permanently voted TCLS configuration
• Add ecc_manager to log and errors
• Add resynchronization to ODRG and TCLS
• Expose additional error logging signals
• Add scrubber to ECC SRAM wrap
• Add testing signals for tapeout

Changed

• Expose ecc_sram ecc error signals
• Rename cTCLS to ODRG
• Hide bus ecc behind bender targets, remove related dependencies

v0.4.0

Changed

• Clean up interface of cTCLS_unit

v0.3.0

Bump to version 0.3.0

v0.2.0

Add TMR majority voters