Enable usb0 and usb1 on shikra QLI - #1001
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Merge Check Failed: CR Not Eligible for Merge CR 4652998 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
Shiraz Hashim (shashim-quic)
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arm64: dts: qcom: Add support for usb nodes on Shikra
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Merge Check Failed: CR Not Eligible for Merge CR 4652998 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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Merge Check Failed: CR Not Eligible for Merge CR 4652998 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #1001 — validate-patchPR: #1001
Final Summary
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PR #1001 — checker-log-analyzerPR: #1001
Detailed report: Full report
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PR #1001 — validate-patchPR: #1001
Final Summary
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PR #1001 — checker-log-analyzerPR: #1001
Detailed report: Full report
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Test Matrix
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Test Matrix
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Akash Kumar (@akakum-oss) As per image team, adb is not functional with this PR on shikra, please check this. |
Test Matrix
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This reverts commit 90ffd3d. This out-of-tree USB DT change for the Shikra CQM/CQS platforms is being superseded by the upstream-accepted lore.kernel.org USB series, which reintroduces the usb_1_hsphy/usb_qmpphy nodes and PM4125 supply wiring in an upstream-aligned form. Revert it here so the upstream series can be applied cleanly on top without duplicate/conflicting nodes. Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
…changes to shikra" This reverts the pm4125_hs_in/pm4125_ss_in typec role-switch wiring introduced by commit 102ec26: - Remove the &pm4125_typec connector node and &pm4125_vbus regulator node (with the pm4125_hs_in/pm4125_ss_in endpoint labels) from shikra-cqm-som.dtsi. - Remove the &pm4125_hs_in/&pm4125_ss_in remote-endpoint stanzas and the &usb_1_dwc3_hs/&usb_qmpphy_out remote-endpoint stanzas from shikra-cqm-evk.dts and shikra-cqs-evk.dts. - Restore usb_1's dr_mode to "peripheral" in both files. The &wifi node and all other content are left untouched. Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
Add support for both USB controllers and their respective phys on Shikra. Link: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
On Shikra CQS/CQM platforms, usb-role-switch is handled by PM4125 on primary Type-C port and Cypress PD controller CYPD6129 on second Type-C port. On Shikra IQS platform, usb-role-switch is handled by Cypress PD controller CYPD6129 on both Type-C ports. Since those changes are not yet present, enabling both USB controllers in device mode. Link: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/ Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
…roller Add the device-tree binding documentation for the Cypress cypd6129 and cypd6229 dual Type-C PD controllers. These are used on Shikra CQM/CQS/IQS platforms to handle usb-role-switch for the USB Type-C ports over an I2C interface, similarly to the existing cypd4226 binding. cypd6229 is a variant of cypd6129 and is described with a "cypress,cypd6129" fallback compatible string. Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
Add cypd6129 and cypd6229 compatible strings to the of_device_id match table so the driver binds to boards describing these Cypress PD controllers in their device tree. No other driver changes are needed since the chip is accessed through the same generic UCSI/HPI I2C register protocol as the existing cypd4226 support. Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
…ype-C ports On Shikra CQS/CQM platforms, usb-role-switch is handled by PM4125 on the primary Type-C port and Cypress PD controller CYPD6129 on the second Type-C port. On Shikra IQS platform, usb-role-switch is handled by Cypress PD controller CYPD6129 on both Type-C ports. Add the CYPD6129 typec node under i2c3, wire its connector endpoints to the corresponding DWC3 controller ports via remote-endpoint phandles, and switch the associated USB controllers to OTG mode so role switching can take effect. Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
Add .cyacd2 firmware flashing support to the CCG UCSI driver, and trigger it automatically from probe when the device reports no usable firmware version. Parsing and flashing: - Parse both .cyacd2 and .cyacd firmware text formats (ccg_parse_cyacd2_text, ccg_parse_cyacd_text), auto-detecting the format from file content (ccg_content_is_cyacd2_text), and convert relative/bank-based rows into absolute flash row addresses (ccg_rows_to_absolute, ccg_parse_and_build_rows). - Add HPIv2 register access helpers (ccg_hpi_read16/write16, ccg_i2c_read, ccg_read_u16/u32) and flash primitives (ccg_cmd_write_flash_row, ccg_cmd_read_flash_row, ccg_cmd_validate_fw, ccg_cmd_reset, ccg_cmd_jump_boot_mode, ccg_enter_flashing_robust) needed to write firmware rows and validate/reset the device afterwards. - Detect hybrid flash layout and derive per-bank row ranges (ccg_is_hybrid, ccg_row_size_from_device_mode, remap_rows_to_bank), and add response/async-event draining and wait helpers (ccg_wait_success, ccg_wait_async_event, ccg_drain_responses, ccg_disable_pd_ports) to keep the flashing sequence in sync with the device. - Rework do_flash() to request the firmware image, parse it into absolute rows, enter flashing mode, write and validate the image, and reset the device, with diagnostic logging of parsed rows and readback for bring-up. - Add a "ccg_fw_file" module parameter to override the firmware file name used for flashing, for bring-up/testing. Probe-time update: - When get_fw_info() reports an empty/zero uc->fw_version at probe time, call ccg_fw_update_needed()/ccg_fw_update() to flash the device before creating/registering the UCSI interface, instead of requiring a manual "echo 1 > do_flash" after boot. - Re-run ucsi_ccg_init() and get_fw_info() after a probe-time flash since do_flash() resets the device, so the correct post-flash firmware version is used for the rest of probe. Existing behavior kept: - The "do_flash" sysfs attribute (do_flash_store -> ccg_update_firmware work item) is unchanged and still available to trigger a flash after the driver has loaded. Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
…oups The Shikra GPIO PINGROUP macro configures intr_target_bit but never sets intr_target_width, leaving it at its zero-initialized default. Set it to 4 to match the width of the interrupt target field. Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com> Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
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done. |
Shiraz Hashim (shashim-quic)
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FROMLIST: ccg firmware update support for cyacd2
Add .cyacd2 firmware flashing support to the CCG UCSI driver, and
trigger it automatically from probe when the device reports no
usable firmware version.Parsing and flashing:
- Parse both .cyacd2 and .cyacd firmware text formats (ccg_parse_cyacd2_text,
ccg_parse_cyacd_text), auto-detecting the format from file content
(ccg_content_is_cyacd2_text), and convert relative/bank-based rows into
absolute flash row addresses (ccg_rows_to_absolute, ccg_parse_and_build_rows).- Add HPIv2 register access helpers (ccg_hpi_read16/write16, ccg_i2c_read,
ccg_read_u16/u32) and flash primitives (ccg_cmd_write_flash_row,
ccg_cmd_read_flash_row, ccg_cmd_validate_fw, ccg_cmd_reset,
ccg_cmd_jump_boot_mode, ccg_enter_flashing_robust) needed to write firmware
rows and validate/reset the device afterwards.- Detect hybrid flash layout and derive per-bank row ranges
(ccg_is_hybrid, ccg_row_size_from_device_mode, remap_rows_to_bank),
and add response/async-event draining and wait helpers
(ccg_wait_success, ccg_wait_async_event, ccg_drain_responses,
ccg_disable_pd_ports) to keep the flashing sequence in sync with the
device.- Rework do_flash() to request the firmware image, parse it into
absolute rows, enter flashing mode, write and validate the image, and
reset the device, with diagnostic logging of parsed rows and readback
for bring-up.- Add a "ccg_fw_file" module parameter to override the firmware file
name used for flashing, for bring-up/testing.Probe-time update:
- When get_fw_info() reports an empty/zero uc->fw_version at probe
time, call ccg_fw_update_needed()/ccg_fw_update() to flash the
device before creating/registering the UCSI interface, instead of
requiring a manual "echo 1 > do_flash" after boot.- Re-run ucsi_ccg_init() and get_fw_info() after a probe-time flash
since do_flash() resets the device, so the correct post-flash
firmware version is used for the rest of probe.Existing behavior kept:
- The "do_flash" sysfs attribute (do_flash_store -> ccg_update_firmware
work item) is unchanged and still available to trigger a flash after
the driver has loaded.Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/
Unable to find this change in the linked lore thread.
this change is needed for SLT builds and needs to be maintained in SLT builds, it is a support change for new firmware and currently it is not backward compatible so it will break in upstream if included , since qualcomm uses ccg6 , old firmware support is not needed. |
Komal Bajaj (Komal-Bajaj)
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Komal Bajaj (Komal-Bajaj)
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Please add correct links in commit message
PR #1001 — validate-patchPR: #1001
Final Summary
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PR #1001 — checker-log-analyzerPR: #1001
Detailed report: Full report
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PR #1001 — validate-patchPR: #1001
Final Summary
|
PR #1001 — checker-log-analyzerPR: #1001
Detailed report: Full report
|
Shiraz Hashim (shashim-quic)
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Shiraz Hashim (shashim-quic)
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FROMLIST: arm64: dts: qcom: shikra: Add gpio-hog for VBUS boost 5V enable
Add a gpio-hog for GPIO 79 (BOOST_5V) on the Shikra CQM/CQS/IQS EVK
boards. This line enables the level translator that is otherwise
left disabled by default, which is required in the industrial
configuration.Also fix the Shikra USB3-DP combo PHY (qcom,shikra-qmp-usb3-dp-phy)
which had no matching driver entry, causing the DWC3 USB controller
to fail probing with a deferred-probe cascade (typec, USB, and
several sync_state() consumers). Add the missing of_device_id entry
and a Shikra-specific PHY config that also deasserts the third GCC
reset line present on Shikra's PHY node but absent from the shared
QCS615 config, which was leaving part of the PHY held in reset and
causing PHY init to time out (-ETIMEDOUT).CRs-Fixed: 4652998
CRs-Fixed: 4635219
Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/
Signed-off-by: Akash Kumar akash.kumar@oss.qualcomm.com
Signed-off-by: Akash Kumar akakum@qti.qualcomm.com
Remove CRs-Fixed from commit log, adding to PR description is enough.
…able Add a gpio-hog for GPIO 79 (BOOST_5V) on the Shikra CQM/CQS/IQS EVK boards. This line enables the level translator that is otherwise left disabled by default, which is required in the industrial configuration. Also fix the Shikra USB3-DP combo PHY (qcom,shikra-qmp-usb3-dp-phy) which had no matching driver entry, causing the DWC3 USB controller to fail probing with a deferred-probe cascade (typec, USB, and several sync_state() consumers). Add the missing of_device_id entry and a Shikra-specific PHY config that also deasserts the third GCC reset line present on Shikra's PHY node but absent from the shared QCS615 config, which was leaving part of the PHY held in reset and causing PHY init to time out (-ETIMEDOUT). Link: https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/ Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com> Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
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PR #1001 — validate-patchPR: #1001
Final Summary
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PR #1001 — checker-log-analyzerPR: #1001
Detailed report: Full report
|
8 participants
arm64: dts: qcom: shikra: Replace out-of-tree USB DT with upstream lore series (v7 USB nodes + CYPD6129 role-switch v2)
This branch reverts the 3 out-of-tree/FROMLIST/PENDING Shikra USB commits
carried in this tree and replaces them with the equivalent upstream
lore.kernel.org patch series, applied cleanly on top of qcom-6.18.y:
(arm64: dts: qcom: Add support for usb nodes on Shikra, v7)
(arm64: dts: qcom: shikra: Wire up usb-role-switch for USB Type-C ports, v2)
Reverted:
Applied on top (from lore, unmodified upstream patches):
Net effect: shikra-cqm-evk, shikra-cqs-evk, and shikra-iqs-evk now use the
upstream CYPD6129/CYPD6229 UCSI Type-C controller for USB role switching
(via &i2c3/typec@40) instead of the previous PM4125-native typec block,
while shikra.dtsi/shikra-evk.dtsi gain the base usb_1/usb_2 dwc3, USB
HS/QMP PHY, and QUSB2 efuse-trim nodes needed to support them.
All four affected board/SoC DT files were rebuilt with dtc
(qcom/shikra-cqm-evk.dtb, qcom/shikra-cqs-evk.dtb, qcom/shikra-iqs-evk.dtb)
with no warnings or errors.
Signed-off-by: Akash Kumar akash.kumar@oss.qualcomm.com
links: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/
https://lore.kernel.org/all/20260820145036.2035641-4-akash.kumar@oss.qualcomm.com/
CRs-Fixed: 4652998
CRs-Fixed:: 4635219