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PENDING: arm64: dts: qcom: nord: add CoreSight debug nodes #1005

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Merged
Shiraz Hashim (shashim-quic) merged 2 commits into from
Aug 25, 2026
Merged

PENDING: arm64: dts: qcom: nord: add CoreSight debug nodes #1005

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370d6cb
Revert "PENDING: arm64: dts: qcom: nord: add CoreSight debug nodes"
jiegan0107 Aug 25, 2026
750af5f
PENDING: arm64: dts: qcom: nord: add CoreSight debug nodes
jiegan0107 Aug 25, 2026
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36 changes: 0 additions & 36 deletions arch/arm64/boot/dts/qcom/nord.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -4614,15 +4614,6 @@
};
};

cti@12021000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x12021000 0x0 0x1000>;

clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
label = "cti_ddr0";
};

itnoc@12200000 {
compatible = "qcom,coresight-itnoc";
reg = <0x0 0x12200000 0x0 0x2e80>;
Expand Down Expand Up @@ -4841,15 +4832,6 @@
};
};

cti@12221000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x12221000 0x0 0x1000>;

clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
label = "cti_ddr1";
};

itnoc@12400000 {
compatible = "qcom,coresight-itnoc";
reg = <0x0 0x12400000 0x0 0x2e80>;
Expand Down Expand Up @@ -5068,15 +5050,6 @@
};
};

cti@12421000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x12421000 0x0 0x1000>;

clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
label = "cti_ddr2";
};

itnoc@12600000 {
compatible = "qcom,coresight-itnoc";
reg = <0x0 0x12600000 0x0 0x2e80>;
Expand Down Expand Up @@ -5295,15 +5268,6 @@
};
};

cti@12621000 {
compatible = "arm,coresight-cti", "arm,primecell";
reg = <0x0 0x12621000 0x0 0x1000>;

clocks = <&aoss_qmp>;
clock-names = "apb_pclk";
label = "cti_ddr3";
};

apps_smmu_0: iommu@15a00000 {
compatible = "qcom,nord-smmu-500",
"qcom,smmu-500",
Expand Down
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