FROMLIST: scsi: ufs: ufs-qcom: Enable only lane clocks in lane clock APIs - #828
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PR #828 — validate-patchPR: #828
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4563277 on any of the following entities: Entities:
CR: 4563277 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
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Change LGTM. |
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ggiriprasad are the comments on upstream change addressed ? |
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Merge Check Failed: CR Not Eligible for Merge CR 4574726 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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Merge Check Failed: CR Not Eligible for Merge CR 4574726 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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…APIs ufs_qcom_enable_lane_clks() and ufs_qcom_disable_lane_clks() currently use clk_bulk_prepare_enable()/clk_bulk_disable_unprepare() on the entire host->clks array obtained from devm_clk_bulk_get_all(). This array contains all device clocks, not just lane symbol clocks. Since the UFS core framework already manages the non-lane clocks via the setup_clocks callback, the bulk enable/disable in the lane clock APIs resulted in duplicate reference count increments on those shared clocks. The extra enable counts were never balanced by a corresponding disable from the framework's clock gating path, preventing the clock reference counts from reaching zero and ultimately blocking CXO shutdown during low-power states. Fix this by restricting the lane clock APIs to only prepare/enable and disable/unprepare the three lane symbol clocks (tx_lane0_sync_clk, rx_lane0_sync_clk, rx_lane1_sync_clk), leaving the handling of all other clocks to the UFS core framework. The lane clocks are now acquired individually via devm_clk_get() instead of being looked up in the bulk clock array. Link: https://lore.kernel.org/linux-scsi/20260909053944.2827968-1-nitin.rawat@oss.qualcomm.com/T/#meb440ffd6fd2965505bbc86a944250f47a68def5 Signed-off-by: Nitin Rawat <nitin.rawat@oss.qualcomm.com> Signed-off-by: Giri Prasad Goriparthi <giri.goriparthi@oss.qualcomm.com>
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qli-2.1 pull-request freeze |
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qualcomm-linux:qcom-6.18.y
…comm-linux#828) scsi: ufs: ufs-qcom: Enable only lane clocks in lane clock APIs
LAVA Failed Case Triage SummaryPR: #828 Job 222511 | SoC monaco-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222511 Failed test cases in LAVA job 222511 (SoC: monaco-evk).
Job 222512 | SoC hamoa-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222512 Failed test cases in LAVA job 222512 (SoC: hamoa-evk).
Job 222513 | SoC qcs9100-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222513 Failed test cases in LAVA job 222513 (SoC: qcs9100-ride).
Job 222514 | SoC shikra-iqs-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222514 Failed test cases in LAVA job 222514 (SoC: shikra-iqs-evk).
Job 222515 | SoC qcs8300-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222515 Failed test cases in LAVA job 222515 (SoC: qcs8300-ride).
Job 222516 | SoC purwa-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222516 Failed test cases in LAVA job 222516 (SoC: purwa-evk).
Job 222517 | SoC lemans-evkLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222517 Failed test cases in LAVA job 222517 (SoC: lemans-evk).
Job 222518 | SoC qcs6490-rb3gen2LAVA job: https://lava-oss.qualcomm.com/scheduler/job/222518 Failed test cases in LAVA job 222518 (SoC: qcs6490-rb3gen2).
Job 222519 | SoC qcs615-rideLAVA job: https://lava-oss.qualcomm.com/scheduler/job/222519 Failed test cases in LAVA job 222519 (SoC: qcs615-ride).
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ufs_qcom_enable_lane_clks() and ufs_qcom_disable_lane_clks() currently use clk_bulk_prepare_enable()/clk_bulk_disable_unprepare() on the entire host->clks array obtained from devm_clk_bulk_get_all(). This array contains all device clocks, not just lane symbol clocks.
Since the UFS core framework already manages the non-lane clocks via the setup_clocks callback, the bulk enable/disable in the lane clock APIs resulted in duplicate reference count increments on those shared clocks. The extra enable counts were never balanced by a corresponding disable from the framework's clock gating path, preventing the clock reference counts from reaching zero and ultimately blocking CXO shutdown during low-power states.
Fix this by restricting the lane clock APIs to only prepare/enable and disable/unprepare the three lane symbol clocks (tx_lane0_sync_clk, rx_lane0_sync_clk, rx_lane1_sync_clk), leaving the handling of all other clocks to the UFS core framewore.
Link: https://lore.kernel.org/linux-scsi/20260909053944.2827968-1-nitin.rawat@oss.qualcomm.com/T/#u
CRs-Fixed: 4574726