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Enable PIL authentication for Qualcomm Wildcat/Nord platform - #37

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Akhilesh Kumar Verma (slategrey-vision-pwrf168) wants to merge 12 commits into
qualcomm-linux:qcom-nextfrom
slategrey-vision-pwrf168:feat/qcom-wildcat-pas
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Enable PIL authentication for Qualcomm Wildcat/Nord platform#37
Akhilesh Kumar Verma (slategrey-vision-pwrf168) wants to merge 12 commits into
qualcomm-linux:qcom-nextfrom
slategrey-vision-pwrf168:feat/qcom-wildcat-pas

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@slategrey-vision-pwrf168 Akhilesh Kumar Verma (slategrey-vision-pwrf168) commented Aug 11, 2026

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Summary

This series enables PIL (Peripheral Image Loading) firmware authentication for the Qualcomm Wildcat/Nord (SA8797P) platform in OP-TEE. It extends the existing Hoya PIL authentication framework to support Nord's hardware and MBN v7 metadata format.

Depends on: PR#20

Key Changes

MBN v7 Metadata Support

  • Parse and validate MBN v7 common-metadata and per-signing-metadata blocks
  • Implement v7-specific binding checks: lifecycle state, OEM root-cert-hash, SOC feature/segment ID
  • Support v7's 2-bit flag encoding (distinct from v6's single-bit encoding)
  • Validate hash-table algorithm selection from signed common-metadata (no fuse lookup needed for v7)

Nord Platform Enablement

  • Add Nord QFPROM register definitions (core/drivers/qcom/qfprom/nord/qfprom_target.h)
  • Enable CFG_QCOM_PAS_AUTH for Nord using sense registers instead of QFPROM driver
  • Gate anti-rollback (ARB) code for Nord (requires QFPROM corrected/raw registers not available on Nord)
  • Refactor fuse reads to use phys_to_virt() directly, removing QFPROM driver context dependency
    - Nord sense-register fuse reads validated against hardware specification

Security Fixes

  • Reject zero SOC_HW_VERSION family number when SOC_HW_VERSION binding is active (v7-only)
  • Validate common-metadata major/minor version before accepting hash_table_algo
  • Fix v6/v7 flag encoding mismatch in OEM_ID/MODEL_ID binding checks

Commits

  1. ta: qcom_pas: parse MBN version 7 hash segments — MBN v7 parsing
  2. ta: qcom_pas: bind MBN version 7 metadata to device fuses — MBN v7 binding checks
  3. ta: qcom_pas: close two MBN v7 validation gaps — v7 security fixes
  4. chore: use phys_to_virt() directly in secboot read helpers — Refactor fuse reads for Nord
  5. drivers: qcom: qfprom: add nord fuse register definitions — Nord QFPROM registers
  6. plat-qcom: wildcat: nord: enable PAS firmware loading and authentication — Nord platform enablement

@b49020

Sumit Garg (b49020) commented Sep 7, 2026

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Please rebase this PR to tip of qcom-next.

@slategrey-vision-pwrf168
ta: qcom_pas: parse MBN version 7 hash segments
61a5808 
MBN v7 keeps the "fixed header followed by concatenated variable-length
regions" shape of v5/v6, but reorders the header fields and adds a
common-metadata block that both signers share, ahead of the per-signer
metadata:

  v6: [header][qti meta][oem meta][hash table][sigs][certs]
  v7: [header][common meta][qti meta][oem meta][hash table][sigs][certs]

Because the header field order differs, v7 needs its own offset set
rather than reusing the v5/v6 MBN_OFF_* constants: only the version
word at 0x04 lands at the same place in both layouts, which is what
lets the version be read before the layout is known.

Add the v7 offsets and header size, teach pas_mbn_parse() to decode
them, and record the common-metadata region in struct pas_mbn so the
metadata decoder can reach the fields it carries. The signed region
grows to cover the common-metadata block, matching what the signature
is computed over.

Add pas_mbn_read_u64() alongside the existing u32 reader; v7 widens
the metadata serial-number entries to 64 bits.

Signed-off-by: Akhilesh Kumar Verma <akhiverm@qti.qualcomm.com>
Assisted-by: Claude:opus-5
@slategrey-vision-pwrf168
ta: qcom_pas: bind MBN version 7 metadata to device fuses
4fc36aa 
Decode the v7 per-signing and common metadata blocks and apply the
existing binding checks to them.

The v7 flags word is not compatible with v6's. v6 uses single-bit
"independent"/"in use" flags; v7 uses 2-bit pairs per field where "10"
means bound and "01" means not bound, and the two encodings overlap at
the same shift positions with opposite polarity. Feeding a v7 flags
word to the v6 accessors would therefore silently invert several
binding decisions, so struct pas_meta now records which encoding its
flags field carries and every gate branches on it. The v6 paths are
unchanged.

Two v7 additions are enforced:

  - the flag word must use only the "10"/"01" encodings; "00" and "11"
    are rejected, covering all eleven defined bit pairs including the
    ones this port does not yet act on, so a malformed word cannot pass
    as a permissive one.

  - an image must bind to JTAG_ID or SOC_HW_VERSION unless its SW_ID is
    one that is allowed to be hardware-independent.

The segment hash-table digest size comes from the signed common
metadata's algorithm field for v7, so no fuse read is needed to pick
it, unlike v6 where it is fuse-selected via root_cert_sel. SHA-512 and
the zero-init hashing variants are rejected: the segment
re-verification path handles 32- and 48-byte digests only.

v7 metadata also carries SOC feature ID, product segment ID, SOC/OEM
lifecycle state and an OEM root-cert-hash field. Enforcing those needs
fuse values this platform's fuse PTA does not expose, so they are left
undecoded rather than partially checked.

The v7 field offsets were validated against the layout a compiler
computes for the corresponding packed structures.

Signed-off-by: Akhilesh Kumar Verma <akhiverm@qti.qualcomm.com>
Assisted-by: Claude:opus-5
@slategrey-vision-pwrf168
drivers: qcom: qfprom: use sense registers via phys_to_virt() for sec…
87f937c 
…boot reads

qfprom_core.c had grown a duplicate set of secboot fuse accessors
(qcom_secboot_is_enabled(), qcom_secboot_get_use_serial_num(),
read_corr_word(), qcom_secboot_get_root_of_trust(), read_sense_reg(),
qcom_secboot_get_device_ids(), qcom_secboot_get_segment_hash_size(),
qcom_secboot_get_eku_enforcement_en(), qcom_secboot_get_image_encryption_en(),
qcom_secboot_get_soc_hw_version()) alongside the pre-existing, correctly
CFG_QCOM_FUSE_PTA-gated versions in qfprom_secboot.c, plus unused
ARB/MRC helpers (qcom_secboot_get_pil_rollback_version(),
qcom_secboot_blow_pil_rollback_version(), qcom_secboot_get_mrc_info(),
popcount32(), unary_mask()) with no callers anywhere in the tree.
Remove the duplicated block from qfprom_core.c entirely.

In qfprom_secboot.c, read qcom_secboot_is_enabled(),
qcom_secboot_get_use_serial_num(), read_sense_reg() and
qcom_secboot_get_soc_hw_version() directly via phys_to_virt() on the
target physical address instead of through a driver-context base VA
(drv->raw_base_va). The physical-to-virtual mapping is already
established by the register_phys_mem_pgdir() calls at the top of the
file, so the result is equivalent, without requiring
qfprom_get_context() on these paths. read_corr_word() keeps the
driver-context style (drv->corr_base_va), since corrected-space reads
still go through the QFPROM driver's mapped VA.

Fix three leftover references to a per-function secboot_on tolerant-
check parameter in pas_sig_auth.c that predate this branch's current
design, where pas_auth_authenticate() gates the entire
pas_sig_auth_authenticate() call on secure-boot state once, making a
per-function tolerate/hard-fail branch downstream both dead and
non-compiling: check_soc_vers_binding() no longer references the
undeclared secboot_on when rejecting a zero SOC_HW_VERSION family
number, check_jtag_or_soc_vers_binding() drops its unused secboot_on
parameter, and check_hw_binding() calls check_metadata_options() with
its actual (no secboot_on) signature.

Fix pas_meta_peek_hash_table_algo() to use the current pas_mbn_locate()
(4-argument) and pas_mbn_reserve_region() API instead of a stale
5-argument pas_mbn_locate() call and a nonexistent
pas_mbn_take_region(), and fix pas_sig_auth_hash_size() to read
slot->meta_data/slot->meta_data_size instead of the nonexistent
slot->md/slot->md_size fields.

These bugs were undetected because CFG_QCOM_QFPROM is not yet enabled
for any platform on this branch; building with
CFG_QCOM_QFPROM=y CFG_QCOM_FUSE_PTA=y (verified against lemans) is
required to compile this code at all.

Signed-off-by: Akhilesh Kumar Verma <akhiverm@qti.qualcomm.com>
@slategrey-vision-pwrf168
drivers: qcom: qfprom: add nord fuse register definitions
f49a0e5 
Add the nord flavor of qfprom_target.h, following the kodiak/lemans
layout and macro naming, for the fields confirmed against nord's fuse
controller register definitions: QFPROM_RAW/CORR base addresses,
SECURE_BOOT (a single register on this platform, unlike hoya's
per-code-segment SECURE_BOOTn array), the 48-byte root-of-trust digest
size, device-identity sense registers, EKU enforcement, and
ROOT_CERT_TOTAL_NUM. Add SECURITY_CONTROL_BASE/SIZE to
wildcat/arch_config.h for the sense-register block these live in.

Two fields are deliberately left undefined rather than approximated:

  - PIL anti-rollback: nord uses a separate fuse-row pair per
    subsystem type instead of hoya's single shared counter, which the
    existing fuse-PTA API (one get/blow call, no subsystem selector)
    cannot express without a shape change of its own. Out of scope
    for this change.

  - MRC activation/revocation: nord's layout splits QC and OEM root
    lists and has additional fields with no located documentation.

TCSR_SOC_HW_VERSION_ADDR is carried over from hoya as a placeholder -
nord's own TCSR register definitions were not found in the accessible
source, so this value is UNCONFIRMED and must be verified before
CFG_QCOM_PAS_AUTH is enabled for this platform, or the SOC_HW_VERSION
binding check will silently read the wrong register. Marked in a
comment above the definition.

This header alone does not make CFG_QCOM_QFPROM buildable for nord;
the region/permission table (qfprom_fuse_region.c) is a separate,
still-missing piece.

Signed-off-by: Akhilesh Kumar Verma <akhiverm@qti.qualcomm.com>
Assisted-by: Claude:opus-5
@slategrey-vision-pwrf168 @claude
plat-qcom: wildcat: nord: enable PAS firmware loading and authentication
a63e837 
Bring up the PAS PTA and the qcom_pas TA on Nord, reserving the VA
space the subsystem controller windows are mapped from and adding the
TA to the early-TA list, mirroring how Lemans is configured.

This enables the PTA-side flow: per-segment hash verification of the
loaded firmware against the hash table in the image's MBN hash segment.

CFG_QCOM_PAS_AUTH, which adds certificate-chain, signature and
fuse-bound binding checks on top, is also enabled. Fuse reads use
sense registers (hardware shadow of fuse rows) instead of the QFPROM
driver, so no CFG_QCOM_QFPROM dependency is needed — see the
"chore: use phys_to_virt()..." commit for the sense-register fuse
read implementation.

CFG_QCOM_PAS_PTA remains disabled pending creation of
core/pta/qcom/pas/platform/nord/ (the per-subsystem PIL driver).

PIL anti-rollback (R-13) is a separate concern and does not block
auth enablement — anti-rollback is optional hardening, not a
prerequisite for authentication.

R-06 is now RESOLVED: sense-register fuse reads bypass QFPROM entirely.

Signed-off-by: Akhilesh Kumar Verma <akhiverm@qti.qualcomm.com>
Assisted-by: Claude:opus-5

plat-qcom: nord: restore DARE-TZ memory configuration

The DARE-TZ secure memory region configuration (CFG_TZDRAM_START,
CFG_TEE_RAM_VA_SIZE, CFG_TA_RAM_VA_SIZE) was accidentally removed in
commit 62fd386 when the PAS configuration was added. Restore it with
a condensed comment explaining DARE-TZ setup.

This configuration is essential for Nord's secure memory layout and
must not be deleted.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
ta: qcom_pas: remove redundant function documentation comments
cc14993 
The function names pas_mbn_read_u32() and pas_mbn_read_u64() are
self-documenting; the comments merely restated what the signatures
already convey. Remove them per comment minimization guidelines.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
ta: qcom_pas: minimize MBN v7 offset comment
4ec09fe 
The 6-line comment explaining why v7 has its own offset constants
violates Rule 2 (long comments require justification). The layout
difference is already documented in pas_mbn.h; replace with a
one-line pointer to that documentation.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
core: qcom: qfprom: minimize long comments in nord target header
2aa884f 
Reduce two multi-line comments that violated Rule 2 (long comments
require justification):

1. PIL anti-rollback comment: condensed from 14 lines to 4 lines,
   keeping the key information (status, why it's not defined, consequence).

2. MRC fuse fields comment: condensed from 22 lines to 8 lines,
   removing detailed register bit layouts (specification details)
   and keeping only the architectural decision (why it's undefined).

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
refactor: condense verbose comments per minimization rules
7c6e046 
Reduce 7 multi-line comments that were verbose but justified, condensing
them to preserve essential information while removing redundant details:

- qfprom_target.h: Nord fuse controller (11→5 lines, 55% reduction)
- qfprom_target.h: SECURE_BOOT register (11→4 lines, 64% reduction)
- qfprom_target.h: Root-of-trust digest size (8→3 lines, 63% reduction)
- qfprom_target.h: Device-identity sense registers (10→4 lines, 60% reduction)
- qfprom_target.h: OEM_CONFIG2 register (8→3 lines, 63% reduction)
- pas_sig_auth.c: Serial number binding (11→4 lines, 64% reduction)
- pas_sig_auth.c: Per-segment hash digest size (5→3 lines, 40% reduction)

Total: 64 lines → 26 lines (59% reduction)

All comments remain justified by specification requirements, security
constraints, or architectural decisions. No information loss.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
plat-qcom: nord: condense excessive target.mk comment
2166867 
The 21-line comment explaining CFG_QCOM_PAS_PTA/CFG_QCOM_PAS_AUTH
violated Rule 2 (long comments require justification) by including:
- Build system implementation details (sub.mk requirements)
- Step-by-step enablement instructions
- Nested config dependency explanations
- Fuse read implementation details

Condense to 3 lines stating only the essential fact: why it's disabled
and what's needed to enable it. Implementation details belong in
documentation or commit messages, not config file comments.

Reduction: 21 → 3 lines (86% reduction)

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
core: qcom: qfprom: aggressively condense nord target header comments
544964d 
Reduce all 9 multi-line comments in qfprom_target.h to single-line
comments, removing verbose explanations of register layouts, platform
differences, and implementation details. Keep only essential information:
what the register/field is and any critical status (NOT YET AVAILABLE,
UNCONFIRMED, etc.).

Changes:
- Nord QFPROM base addresses:        5 → 1 line (80% reduction)
- SECURE_BOOT register bits:         4 → 1 line (75% reduction)
- OEM root-of-trust digest size:     3 → 1 line (67% reduction)
- PIL anti-rollback:                 4 → 1 line (75% reduction)
- Device-identity sense registers:   4 → 1 line (75% reduction)
- Serial number sense register:      5 → 1 line (80% reduction)
- TCSR SOC_HW_VERSION:              13 → 1 line (92% reduction)
- OEM_CONFIG2:                       3 → 1 line (67% reduction)
- MRC fuse fields:                   8 → 1 line (88% reduction)
- OEM image encryption:              6 → 1 line (83% reduction)

Total: 55 lines → 10 lines (82% reduction)

All essential information preserved. Register addresses, bit masks,
and critical status flags remain. Verbose architectural explanations
and platform comparisons removed.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
@slategrey-vision-pwrf168 @claude
ta: qcom_pas: aggressively condense pas_mbn.h comments
8dd2c91 
Reduce two large multi-line comments to compact multi-line format:

1. MBN hash segment layout: 21 → 2 lines (90% reduction)
   - Removed verbose explanation of INIT_IMAGE blob structure
   - Removed detailed v6/v7 comparison text
   - Kept essential layout diagram in compact form

2. struct pas_mbn documentation: 34 → 24 lines (29% reduction)
   - Removed verbose field descriptions
   - Condensed to single-line per-field format
   - Kept all field names, types, and constraints

Total: 55 lines → 26 lines (53% reduction)

All essential information preserved: layout diagrams, field semantics,
version differences, and API constraints. Verbose explanations removed.

Co-Authored-By: Claude Haiku 4.5 <noreply@anthropic.com>
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@slategrey-vision-pwrf168 @b49020