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h2: restore DEVICE_PAGE_SIZE to SIZE_4M for correct subsystem register mapping#71

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h2: restore DEVICE_PAGE_SIZE to SIZE_4M for correct subsystem register mapping#71
Brian Cain (androm3da) wants to merge 1 commit into
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androm3da:bcain/qemu_boot-1

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The device-page TLB entry maps Q6_SS_BASE_VA to the subsystem public- register base (PUB_BASE). Both the L2VIC (at PRIV_BASE + 0x10000) and the H2 hardware timer (at PRIV_BASE + 0x20000) are accessed through this mapping.

With DEVICE_PAGE_SIZE = SIZE_1M (1 MB), the mapped window covers only 0xfc800000..0xfc8fffff (physical). L2VIC at 0xfc910000 and the timer at 0xfc920000 fall outside this window, so writes to those registers are silently lost. The L2VIC never receives the interrupt-enable configuration and the H2 timer MMIO is never reachable, so the guest kernel never receives timer interrupts and hangs after the angel0 console is disabled.

Restore DEVICE_PAGE_SIZE to SIZE_4M so the 4 MB device-page covers 0xfc800000..0xfcbfffff, which includes L2VIC and the timer.

Update BOOT_TLBLO_DEV in boot.h and the MAKE_TLBLO_DEV / MAKE_TLBHI macro calls in boot.ref.S to use SIZE_4M / BOOT_TLB_OFFSET_BITS_4M / BOOT_TLB_SHIFT_4M to match the new page size.

…r mapping

The device-page TLB entry maps Q6_SS_BASE_VA to the subsystem public-
register base (PUB_BASE).  Both the L2VIC (at PRIV_BASE + 0x10000) and
the H2 hardware timer (at PRIV_BASE + 0x20000) are accessed through this
mapping.

With DEVICE_PAGE_SIZE = SIZE_1M (1 MB), the mapped window covers only
0xfc800000..0xfc8fffff (physical).  L2VIC at 0xfc910000 and the timer at
0xfc920000 fall outside this window, so writes to those registers are
silently lost.  The L2VIC never receives the interrupt-enable
configuration and the H2 timer MMIO is never reachable, so the guest
kernel never receives timer interrupts and hangs after the angel0
console is disabled.

Restore DEVICE_PAGE_SIZE to SIZE_4M so the 4 MB device-page covers
0xfc800000..0xfcbfffff, which includes L2VIC and the timer.

Update BOOT_TLBLO_DEV in boot.h and the MAKE_TLBLO_DEV / MAKE_TLBHI
macro calls in boot.ref.S to use SIZE_4M / BOOT_TLB_OFFSET_BITS_4M /
BOOT_TLB_SHIFT_4M to match the new page size.

Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
@androm3da

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ping Bryan Bayerdorffer (@bryanb-h2)

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