feature: accelerate 2D width-tiled conv and depthwise on CMSIS-NN and ESP-NN

[asteinh]

Summary

2D (width) tiles - where a single output row exceeds the fast budget so TiGrIS partitions width
as well as height - fell back to s8_ref on the accelerated backends. This teaches the CMSIS-NN and
ESP-NN Conv/Depthwise adapters to honor the packed-width tile. Third and final substep of Phase
1.5 (native tile-contract acceleration).

Stacked on #38 (1.5b); the base retargets to develop after #38 merges.

Change

• tigris_accel_try_s8_ref (tigris_kernels_s8.c): a width-tiled conv/depthwise now proceeds to
  the vendor adapter; every other width-tiled op still routes to s8_ref.
• CMSIS-NN + ESP-NN adapters: when width_tiled, read tile.in_w/out_w/pad_left in addition
  to the height tile context. CMSIS and the ESP depthwise use implicit right-pad clipping (columns
  at or past IW clip to the input zero-point), mirroring the implicit bottom pad from 1.5a. The ESP
  conv folds tile.pad_left/pad_right into its existing asymmetric pre-pad bounce
  (exec_stage_tiled_2d sets all four tile pads).
• test_accel_routing.c: a width-tiled conv/depthwise routes to the adapter; a width-tiled max-pool
  still routes to reference.

Testing

• Routing unit tests pass.
• Host CMSIS-NN differential on 2D-tiled plans (a wide 3x3 conv and a wide depthwise, each 36 tiles
  across 12 rows so the tiling is genuinely 2D; instrumentation confirmed the CMSIS width block
  executes with per-tile in_w/out_w/pad_left, e.g. edge tile in_w=5 out_w=4 pl=1):
  max_abs_diff=0 (bit-exact) vs reference. The 1.5a plain-height and 1.5b rolled-chain
  differentials still pass.
• Full runtime unit suite green; stack-usage gate passes; MISRA baseline unchanged (0 new findings).
• ESP-NN acceleration is Xtensa-only, so its width path mirrors the host-verified CMSIS logic and is
  validated on-device (SiliconRig) separately.

Follow-up

With all three substeps landed, the accelerated multi-board bench rerun (the Phase 1 capstone) can
run without any tiled conv/depthwise silently dropping to s8_ref. The persistent CI differentials
(tiled/rolled/2D cases in tigris-bench host-validation + a core-versions.json re-pin) land after
these merge.